From: Marek Olšák <[email protected]>

This removes 35+ clear eliminate passes from DOTA 2.
---
 src/gallium/drivers/radeonsi/si_clear.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_clear.c 
b/src/gallium/drivers/radeonsi/si_clear.c
index 00589ca..4663fc2 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -414,57 +414,74 @@ static void si_do_fast_color_clear(struct si_context 
*sctx,
                         * clears, which is weighed when determining whether to
                         * enable separate DCC.
                         */
                        if (tex->dcc_gather_statistics &&
                            sctx->b.family == CHIP_STONEY)
                                tex->num_slow_clears++;
                }
 
                bool need_decompress_pass = false;
 
+               /* Use a slow clear for small surfaces where the cost of
+                * the eliminate pass can be higher than the benefit of fast
+                * clear. The closed driver does this, but the numbers may 
differ.
+                *
+                * Always use fast clear on APUs.
+                */
+               bool too_small = sctx->screen->b.info.has_dedicated_vram &&
+                                tex->resource.b.b.nr_samples <= 1 &&
+                                tex->resource.b.b.width0 <= 256 &&
+                                tex->resource.b.b.height0 <= 256;
+
                /* Try to clear DCC first, otherwise try CMASK. */
                if (vi_dcc_enabled(tex, 0)) {
                        uint32_t reset_value;
                        bool clear_words_needed;
 
                        if (sctx->screen->b.debug_flags & DBG(NO_DCC_CLEAR))
                                continue;
 
                        /* This can only occur with MSAA. */
                        if (sctx->b.chip_class == VI &&
                            
!tex->surface.u.legacy.level[level].dcc_fast_clear_size)
                                continue;
 
                        if (!vi_get_fast_clear_parameters(fb->cbufs[i]->format,
                                                          color, &reset_value,
                                                          &clear_words_needed))
                                continue;
 
+                       if (clear_words_needed && too_small)
+                               continue;
+
                        /* DCC fast clear with MSAA should clear CMASK to 0xC. 
*/
                        if (tex->resource.b.b.nr_samples >= 2 && 
tex->cmask.size) {
                                /* TODO: This doesn't work with MSAA. */
                                if (clear_words_needed)
                                        continue;
 
                                si_clear_buffer(&sctx->b.b, 
&tex->cmask_buffer->b.b,
                                                tex->cmask.offset, 
tex->cmask.size,
                                                0xCCCCCCCC, 
R600_COHERENCY_CB_META);
                                need_decompress_pass = true;
                        }
 
                        vi_dcc_clear_level(sctx, tex, 0, reset_value);
 
                        if (clear_words_needed)
                                need_decompress_pass = true;
 
                        tex->separate_dcc_dirty = true;
                } else {
+                       if (too_small)
+                               continue;
+
                        /* 128-bit formats are unusupported */
                        if (tex->surface.bpe > 8) {
                                continue;
                        }
 
                        /* RB+ doesn't work with CMASK fast clear on Stoney. */
                        if (sctx->b.family == CHIP_STONEY)
                                continue;
 
                        /* ensure CMASK is enabled */
-- 
2.7.4

_______________________________________________
mesa-dev mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Reply via email to