From: Marek Olšák <[email protected]>
---
src/gallium/drivers/radeon/r600_pipe_common.c | 6 --
src/gallium/drivers/radeon/radeon_video.c | 149 -------------------------
src/gallium/drivers/radeon/radeon_video.h | 14 +--
src/gallium/drivers/radeonsi/si_get.c | 150 +++++++++++++++++++++++++-
4 files changed, 151 insertions(+), 168 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index dc776a2..c912d0b 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -585,26 +585,20 @@ struct pipe_resource *si_resource_create_common(struct
pipe_screen *screen,
return si_texture_create(screen, templ);
}
}
bool si_common_screen_init(struct r600_common_screen *rscreen,
struct radeon_winsys *ws)
{
rscreen->b.resource_destroy = u_resource_destroy_vtbl;
rscreen->b.resource_from_user_memory = si_buffer_from_user_memory;
- if (rscreen->info.has_hw_decode) {
- rscreen->b.is_video_format_supported =
si_vid_is_format_supported;
- } else {
- rscreen->b.is_video_format_supported =
vl_video_buffer_is_format_supported;
- }
-
si_init_screen_texture_functions(rscreen);
si_init_screen_query_functions(rscreen);
rscreen->debug_flags |= debug_get_flags_option("R600_DEBUG",
common_debug_options, 0);
rscreen->has_rbplus = false;
rscreen->rbplus_allowed = false;
slab_create_parent(&rscreen->pool_transfers, sizeof(struct
r600_transfer), 64);
rscreen->force_aniso = MIN2(16, debug_get_num_option("R600_TEX_ANISO",
-1));
diff --git a/src/gallium/drivers/radeon/radeon_video.c
b/src/gallium/drivers/radeon/radeon_video.c
index 4edd0a4..a5505ab 100644
--- a/src/gallium/drivers/radeon/radeon_video.c
+++ b/src/gallium/drivers/radeon/radeon_video.c
@@ -30,22 +30,20 @@
#include "util/u_memory.h"
#include "util/u_video.h"
#include "vl/vl_defines.h"
#include "vl/vl_video_buffer.h"
#include "r600_pipe_common.h"
#include "radeon_video.h"
#include "radeon_vce.h"
-#define UVD_FW_1_66_16 ((1 << 24) | (66 << 16) | (16 << 8))
-
/* generate an stream handle */
unsigned si_vid_alloc_stream_handle()
{
static unsigned counter = 0;
unsigned stream_handle = 0;
unsigned pid = getpid();
int i;
for (i = 0; i < 32; ++i)
stream_handle |= ((pid >> i) & 1) << (31 - i);
@@ -207,157 +205,10 @@ void si_vid_join_surfaces(struct r600_common_context
*rctx,
for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
if (!buffers[i] || !*buffers[i])
continue;
pb_reference(buffers[i], pb);
}
pb_reference(&pb, NULL);
}
-
-int si_vid_get_video_param(struct pipe_screen *screen,
- enum pipe_video_profile profile,
- enum pipe_video_entrypoint entrypoint,
- enum pipe_video_cap param)
-{
- struct r600_common_screen *rscreen = (struct r600_common_screen
*)screen;
- enum pipe_video_format codec = u_reduce_video_profile(profile);
- struct radeon_info info;
-
- rscreen->ws->query_info(rscreen->ws, &info);
-
- if (entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
- switch (param) {
- case PIPE_VIDEO_CAP_SUPPORTED:
- return codec == PIPE_VIDEO_FORMAT_MPEG4_AVC &&
- (si_vce_is_fw_version_supported(rscreen) ||
- rscreen->family == CHIP_RAVEN);
- case PIPE_VIDEO_CAP_NPOT_TEXTURES:
- return 1;
- case PIPE_VIDEO_CAP_MAX_WIDTH:
- return (rscreen->family < CHIP_TONGA) ? 2048 : 4096;
- case PIPE_VIDEO_CAP_MAX_HEIGHT:
- return (rscreen->family < CHIP_TONGA) ? 1152 : 2304;
- case PIPE_VIDEO_CAP_PREFERED_FORMAT:
- return PIPE_FORMAT_NV12;
- case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
- return false;
- case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
- return false;
- case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
- return true;
- case PIPE_VIDEO_CAP_STACKED_FRAMES:
- return (rscreen->family < CHIP_TONGA) ? 1 : 2;
- default:
- return 0;
- }
- }
-
- switch (param) {
- case PIPE_VIDEO_CAP_SUPPORTED:
- switch (codec) {
- case PIPE_VIDEO_FORMAT_MPEG12:
- return profile != PIPE_VIDEO_PROFILE_MPEG1;
- case PIPE_VIDEO_FORMAT_MPEG4:
- return 1;
- case PIPE_VIDEO_FORMAT_MPEG4_AVC:
- if ((rscreen->family == CHIP_POLARIS10 ||
- rscreen->family == CHIP_POLARIS11) &&
- info.uvd_fw_version < UVD_FW_1_66_16 ) {
- RVID_ERR("POLARIS10/11 firmware version need to
be updated.\n");
- return false;
- }
- return true;
- case PIPE_VIDEO_FORMAT_VC1:
- return true;
- case PIPE_VIDEO_FORMAT_HEVC:
- /* Carrizo only supports HEVC Main */
- if (rscreen->family >= CHIP_STONEY)
- return (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN
||
- profile ==
PIPE_VIDEO_PROFILE_HEVC_MAIN_10);
- else if (rscreen->family >= CHIP_CARRIZO)
- return profile == PIPE_VIDEO_PROFILE_HEVC_MAIN;
- return false;
- case PIPE_VIDEO_FORMAT_JPEG:
- if (rscreen->family < CHIP_CARRIZO || rscreen->family
>= CHIP_VEGA10)
- return false;
- if (!(rscreen->info.drm_major == 3 &&
rscreen->info.drm_minor >= 19)) {
- RVID_ERR("No MJPEG support for the kernel
version\n");
- return false;
- }
- return true;
- default:
- return false;
- }
- case PIPE_VIDEO_CAP_NPOT_TEXTURES:
- return 1;
- case PIPE_VIDEO_CAP_MAX_WIDTH:
- return (rscreen->family < CHIP_TONGA) ? 2048 : 4096;
- case PIPE_VIDEO_CAP_MAX_HEIGHT:
- return (rscreen->family < CHIP_TONGA) ? 1152 : 4096;
- case PIPE_VIDEO_CAP_PREFERED_FORMAT:
- if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
- return PIPE_FORMAT_P016;
- else
- return PIPE_FORMAT_NV12;
-
- case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
- case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED: {
- enum pipe_video_format format = u_reduce_video_profile(profile);
-
- if (format == PIPE_VIDEO_FORMAT_HEVC)
- return false; //The firmware doesn't support interlaced
HEVC.
- else if (format == PIPE_VIDEO_FORMAT_JPEG)
- return false;
- return true;
- }
- case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
- return true;
- case PIPE_VIDEO_CAP_MAX_LEVEL:
- switch (profile) {
- case PIPE_VIDEO_PROFILE_MPEG1:
- return 0;
- case PIPE_VIDEO_PROFILE_MPEG2_SIMPLE:
- case PIPE_VIDEO_PROFILE_MPEG2_MAIN:
- return 3;
- case PIPE_VIDEO_PROFILE_MPEG4_SIMPLE:
- return 3;
- case PIPE_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE:
- return 5;
- case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
- return 1;
- case PIPE_VIDEO_PROFILE_VC1_MAIN:
- return 2;
- case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
- return 4;
- case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
- case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
- case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
- return (rscreen->family < CHIP_TONGA) ? 41 : 52;
- case PIPE_VIDEO_PROFILE_HEVC_MAIN:
- case PIPE_VIDEO_PROFILE_HEVC_MAIN_10:
- return 186;
- default:
- return 0;
- }
- default:
- return 0;
- }
-}
-
-boolean si_vid_is_format_supported(struct pipe_screen *screen,
- enum pipe_format format,
- enum pipe_video_profile profile,
- enum pipe_video_entrypoint entrypoint)
-{
- /* HEVC 10 bit decoding should use P016 instead of NV12 if possible */
- if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
- return (format == PIPE_FORMAT_NV12) ||
- (format == PIPE_FORMAT_P016);
-
- /* we can only handle this one with UVD */
- if (profile != PIPE_VIDEO_PROFILE_UNKNOWN)
- return format == PIPE_FORMAT_NV12;
-
- return vl_video_buffer_is_format_supported(screen, format, profile,
entrypoint);
-}
diff --git a/src/gallium/drivers/radeon/radeon_video.h
b/src/gallium/drivers/radeon/radeon_video.h
index c5b84e1..64ee454 100644
--- a/src/gallium/drivers/radeon/radeon_video.h
+++ b/src/gallium/drivers/radeon/radeon_video.h
@@ -27,20 +27,22 @@
#ifndef RADEON_VIDEO_H
#define RADEON_VIDEO_H
#include "radeon/radeon_winsys.h"
#include "vl/vl_video_buffer.h"
#define RVID_ERR(fmt, args...) \
fprintf(stderr, "EE %s:%d %s UVD - "fmt, __FILE__, __LINE__, __func__,
##args)
+#define UVD_FW_1_66_16 ((1 << 24) | (66 << 16) | (16 << 8))
+
/* video buffer representation */
struct rvid_buffer
{
unsigned usage;
struct r600_resource *res;
};
/* generate an stream handle */
unsigned si_vid_alloc_stream_handle(void);
@@ -57,23 +59,11 @@ bool si_vid_resize_buffer(struct pipe_screen *screen,
struct radeon_winsys_cs *c
/* clear the buffer with zeros */
void si_vid_clear_buffer(struct pipe_context *context, struct rvid_buffer*
buffer);
/* join surfaces into the same buffer with identical tiling params
sumup their sizes and replace the backend buffers with a single bo */
void si_vid_join_surfaces(struct r600_common_context *rctx,
struct pb_buffer** buffers[VL_NUM_COMPONENTS],
struct radeon_surf *surfaces[VL_NUM_COMPONENTS]);
-/* returns supported codecs and other parameters */
-int si_vid_get_video_param(struct pipe_screen *screen,
- enum pipe_video_profile profile,
- enum pipe_video_entrypoint entrypoint,
- enum pipe_video_cap param);
-
-/* the hardware only supports NV12 */
-boolean si_vid_is_format_supported(struct pipe_screen *screen,
- enum pipe_format format,
- enum pipe_video_profile profile,
- enum pipe_video_entrypoint entrypoint);
-
#endif // RADEON_VIDEO_H
diff --git a/src/gallium/drivers/radeonsi/si_get.c
b/src/gallium/drivers/radeonsi/si_get.c
index 349f7dd..9d38636 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -16,23 +16,25 @@
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "si_pipe.h"
#include "radeon/radeon_video.h"
+#include "radeon/radeon_vce.h"
#include "ac_llvm_util.h"
#include "vl/vl_decoder.h"
#include "vl/vl_video_buffer.h"
+#include "util/u_video.h"
#include "compiler/nir/nir.h"
#include <sys/utsname.h>
static const char *si_get_vendor(struct pipe_screen *pscreen)
{
return "X.Org";
}
static const char *si_get_device_vendor(struct pipe_screen *pscreen)
@@ -564,20 +566,164 @@ static int si_get_video_param_no_decode(struct
pipe_screen *screen,
return false;
case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
return true;
case PIPE_VIDEO_CAP_MAX_LEVEL:
return vl_level_supported(screen, profile);
default:
return 0;
}
}
+static int si_get_video_param(struct pipe_screen *screen,
+ enum pipe_video_profile profile,
+ enum pipe_video_entrypoint entrypoint,
+ enum pipe_video_cap param)
+{
+ struct si_screen *sscreen = (struct si_screen *)screen;
+ enum pipe_video_format codec = u_reduce_video_profile(profile);
+
+ if (entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
+ switch (param) {
+ case PIPE_VIDEO_CAP_SUPPORTED:
+ return codec == PIPE_VIDEO_FORMAT_MPEG4_AVC &&
+ (si_vce_is_fw_version_supported(&sscreen->b) ||
+ sscreen->b.family == CHIP_RAVEN);
+ case PIPE_VIDEO_CAP_NPOT_TEXTURES:
+ return 1;
+ case PIPE_VIDEO_CAP_MAX_WIDTH:
+ return (sscreen->b.family < CHIP_TONGA) ? 2048 : 4096;
+ case PIPE_VIDEO_CAP_MAX_HEIGHT:
+ return (sscreen->b.family < CHIP_TONGA) ? 1152 : 2304;
+ case PIPE_VIDEO_CAP_PREFERED_FORMAT:
+ return PIPE_FORMAT_NV12;
+ case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
+ return false;
+ case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
+ return false;
+ case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
+ return true;
+ case PIPE_VIDEO_CAP_STACKED_FRAMES:
+ return (sscreen->b.family < CHIP_TONGA) ? 1 : 2;
+ default:
+ return 0;
+ }
+ }
+
+ switch (param) {
+ case PIPE_VIDEO_CAP_SUPPORTED:
+ switch (codec) {
+ case PIPE_VIDEO_FORMAT_MPEG12:
+ return profile != PIPE_VIDEO_PROFILE_MPEG1;
+ case PIPE_VIDEO_FORMAT_MPEG4:
+ return 1;
+ case PIPE_VIDEO_FORMAT_MPEG4_AVC:
+ if ((sscreen->b.family == CHIP_POLARIS10 ||
+ sscreen->b.family == CHIP_POLARIS11) &&
+ sscreen->b.info.uvd_fw_version < UVD_FW_1_66_16 ) {
+ RVID_ERR("POLARIS10/11 firmware version need to
be updated.\n");
+ return false;
+ }
+ return true;
+ case PIPE_VIDEO_FORMAT_VC1:
+ return true;
+ case PIPE_VIDEO_FORMAT_HEVC:
+ /* Carrizo only supports HEVC Main */
+ if (sscreen->b.family >= CHIP_STONEY)
+ return (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN
||
+ profile ==
PIPE_VIDEO_PROFILE_HEVC_MAIN_10);
+ else if (sscreen->b.family >= CHIP_CARRIZO)
+ return profile == PIPE_VIDEO_PROFILE_HEVC_MAIN;
+ return false;
+ case PIPE_VIDEO_FORMAT_JPEG:
+ if (sscreen->b.family < CHIP_CARRIZO ||
sscreen->b.family >= CHIP_VEGA10)
+ return false;
+ if (!(sscreen->b.info.drm_major == 3 &&
sscreen->b.info.drm_minor >= 19)) {
+ RVID_ERR("No MJPEG support for the kernel
version\n");
+ return false;
+ }
+ return true;
+ default:
+ return false;
+ }
+ case PIPE_VIDEO_CAP_NPOT_TEXTURES:
+ return 1;
+ case PIPE_VIDEO_CAP_MAX_WIDTH:
+ return (sscreen->b.family < CHIP_TONGA) ? 2048 : 4096;
+ case PIPE_VIDEO_CAP_MAX_HEIGHT:
+ return (sscreen->b.family < CHIP_TONGA) ? 1152 : 4096;
+ case PIPE_VIDEO_CAP_PREFERED_FORMAT:
+ if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
+ return PIPE_FORMAT_P016;
+ else
+ return PIPE_FORMAT_NV12;
+
+ case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
+ case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED: {
+ enum pipe_video_format format = u_reduce_video_profile(profile);
+
+ if (format == PIPE_VIDEO_FORMAT_HEVC)
+ return false; //The firmware doesn't support interlaced
HEVC.
+ else if (format == PIPE_VIDEO_FORMAT_JPEG)
+ return false;
+ return true;
+ }
+ case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
+ return true;
+ case PIPE_VIDEO_CAP_MAX_LEVEL:
+ switch (profile) {
+ case PIPE_VIDEO_PROFILE_MPEG1:
+ return 0;
+ case PIPE_VIDEO_PROFILE_MPEG2_SIMPLE:
+ case PIPE_VIDEO_PROFILE_MPEG2_MAIN:
+ return 3;
+ case PIPE_VIDEO_PROFILE_MPEG4_SIMPLE:
+ return 3;
+ case PIPE_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE:
+ return 5;
+ case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
+ return 1;
+ case PIPE_VIDEO_PROFILE_VC1_MAIN:
+ return 2;
+ case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
+ return 4;
+ case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
+ case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
+ case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
+ return (sscreen->b.family < CHIP_TONGA) ? 41 : 52;
+ case PIPE_VIDEO_PROFILE_HEVC_MAIN:
+ case PIPE_VIDEO_PROFILE_HEVC_MAIN_10:
+ return 186;
+ default:
+ return 0;
+ }
+ default:
+ return 0;
+ }
+}
+
+static boolean si_vid_is_format_supported(struct pipe_screen *screen,
+ enum pipe_format format,
+ enum pipe_video_profile profile,
+ enum pipe_video_entrypoint entrypoint)
+{
+ /* HEVC 10 bit decoding should use P016 instead of NV12 if possible */
+ if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
+ return (format == PIPE_FORMAT_NV12) ||
+ (format == PIPE_FORMAT_P016);
+
+ /* we can only handle this one with UVD */
+ if (profile != PIPE_VIDEO_PROFILE_UNKNOWN)
+ return format == PIPE_FORMAT_NV12;
+
+ return vl_video_buffer_is_format_supported(screen, format, profile,
entrypoint);
+}
+
static unsigned get_max_threads_per_block(struct si_screen *screen,
enum pipe_shader_ir ir_type)
{
if (ir_type != PIPE_SHADER_IR_TGSI)
return 256;
/* Only 16 waves per thread-group on gfx9. */
if (screen->b.chip_class >= GFX9)
return 1024;
@@ -836,17 +982,19 @@ void si_init_screen_get_functions(struct si_screen
*sscreen)
sscreen->b.b.get_compute_param = si_get_compute_param;
sscreen->b.b.get_timestamp = si_get_timestamp;
sscreen->b.b.get_shader_param = si_get_shader_param;
sscreen->b.b.get_compiler_options = si_get_compiler_options;
sscreen->b.b.get_device_uuid = si_get_device_uuid;
sscreen->b.b.get_driver_uuid = si_get_driver_uuid;
sscreen->b.b.query_memory_info = si_query_memory_info;
sscreen->b.b.get_disk_shader_cache = si_get_disk_shader_cache;
if (sscreen->b.info.has_hw_decode) {
- sscreen->b.b.get_video_param = si_vid_get_video_param;
+ sscreen->b.b.get_video_param = si_get_video_param;
+ sscreen->b.b.is_video_format_supported =
si_vid_is_format_supported;
} else {
sscreen->b.b.get_video_param = si_get_video_param_no_decode;
+ sscreen->b.b.is_video_format_supported =
vl_video_buffer_is_format_supported;
}
si_init_renderer_string(sscreen);
}
--
2.7.4
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