From: Marek Olšák <[email protected]>
---
src/gallium/drivers/radeonsi/si_clear.c | 25 +++++++++++--------------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_clear.c
b/src/gallium/drivers/radeonsi/si_clear.c
index 29e63c7..00589ca 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -412,24 +412,26 @@ static void si_do_fast_color_clear(struct si_context
*sctx,
/* RB+ isn't supported with a CMASK clear only on
Stoney,
* so all clears are considered to be hypothetically
slow
* clears, which is weighed when determining whether to
* enable separate DCC.
*/
if (tex->dcc_gather_statistics &&
sctx->b.family == CHIP_STONEY)
tex->num_slow_clears++;
}
+ bool need_decompress_pass = false;
+
/* Try to clear DCC first, otherwise try CMASK. */
if (vi_dcc_enabled(tex, 0)) {
uint32_t reset_value;
- bool clear_words_needed, cleared_cmask = false;
+ bool clear_words_needed;
if (sctx->screen->b.debug_flags & DBG(NO_DCC_CLEAR))
continue;
/* This can only occur with MSAA. */
if (sctx->b.chip_class == VI &&
!tex->surface.u.legacy.level[level].dcc_fast_clear_size)
continue;
if (!vi_get_fast_clear_parameters(fb->cbufs[i]->format,
@@ -439,33 +441,28 @@ static void si_do_fast_color_clear(struct si_context
*sctx,
/* DCC fast clear with MSAA should clear CMASK to 0xC.
*/
if (tex->resource.b.b.nr_samples >= 2 &&
tex->cmask.size) {
/* TODO: This doesn't work with MSAA. */
if (clear_words_needed)
continue;
si_clear_buffer(&sctx->b.b,
&tex->cmask_buffer->b.b,
tex->cmask.offset,
tex->cmask.size,
0xCCCCCCCC,
R600_COHERENCY_CB_META);
- cleared_cmask = true;
+ need_decompress_pass = true;
}
vi_dcc_clear_level(sctx, tex, 0, reset_value);
- if (clear_words_needed || cleared_cmask) {
- bool need_compressed_update =
!tex->dirty_level_mask;
-
- tex->dirty_level_mask |= 1 << level;
+ if (clear_words_needed)
+ need_decompress_pass = true;
- if (need_compressed_update)
-
p_atomic_inc(&sctx->screen->b.compressed_colortex_counter);
- }
tex->separate_dcc_dirty = true;
} else {
/* 128-bit formats are unusupported */
if (tex->surface.bpe > 8) {
continue;
}
/* RB+ doesn't work with CMASK fast clear on Stoney. */
if (sctx->b.family == CHIP_STONEY)
continue;
@@ -473,27 +470,27 @@ static void si_do_fast_color_clear(struct si_context
*sctx,
/* ensure CMASK is enabled */
si_alloc_separate_cmask(sctx->screen, tex);
if (tex->cmask.size == 0) {
continue;
}
/* Do the fast clear. */
si_clear_buffer(&sctx->b.b, &tex->cmask_buffer->b.b,
tex->cmask.offset, tex->cmask.size, 0,
R600_COHERENCY_CB_META);
+ need_decompress_pass = true;
+ }
- bool need_compressed_update = !tex->dirty_level_mask;
-
+ if (need_decompress_pass &&
+ !(tex->dirty_level_mask & (1 << level))) {
tex->dirty_level_mask |= 1 << level;
-
- if (need_compressed_update)
-
p_atomic_inc(&sctx->screen->b.compressed_colortex_counter);
+
p_atomic_inc(&sctx->screen->b.compressed_colortex_counter);
}
/* We can change the micro tile mode before a full clear. */
si_set_optimal_micro_tile_mode(sctx->screen, tex);
si_set_clear_color(tex, fb->cbufs[i]->format, color);
sctx->framebuffer.dirty_cbufs |= 1 << i;
si_mark_atom_dirty(sctx, &sctx->framebuffer.atom);
*buffers &= ~clear_bit;
--
2.7.4
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