[Mesa-dev] [PATCH 01/18] radeonsi: create get_tcs_tes_buffer_address helper

[Timothy Arceri]

This will be shared between the NIR and TGSI backends.
---
 src/gallium/drivers/radeonsi/si_shader.c | 44 +++++++++++++++++++++++---------
 1 file changed, 32 insertions(+), 12 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 5da9ec0bf54..00770547499 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -970,31 +970,59 @@ static LLVMValueRef get_tcs_tes_buffer_address(struct 
si_shader_context *ctx,
        if (!vertex_index) {
                LLVMValueRef patch_data_offset =
                           unpack_param(ctx, ctx->param_tcs_offchip_layout, 12, 
20);
 
                base_addr = LLVMBuildAdd(ctx->ac.builder, base_addr,
                                         patch_data_offset, "");
        }
        return base_addr;
 }
 
+/* This is a generic helper that can be shared by the NIR and TGSI backends */
+static LLVMValueRef get_tcs_tes_buffer_address_from_generic_indices(
+                                       struct si_shader_context *ctx,
+                                       LLVMValueRef vertex_index,
+                                       LLVMValueRef param_index,
+                                       unsigned param_base,
+                                       ubyte *name,
+                                       ubyte *index,
+                                       bool is_patch)
+{
+       unsigned param_index_base;
+
+       param_index_base = is_patch ?
+               si_shader_io_get_unique_index_patch(name[param_base], 
index[param_base]) :
+               si_shader_io_get_unique_index(name[param_base], 
index[param_base]);
+
+       if (param_index) {
+               param_index = LLVMBuildAdd(ctx->ac.builder, param_index,
+                                          LLVMConstInt(ctx->i32, 
param_index_base, 0),
+                                          "");
+       } else {
+               param_index = LLVMConstInt(ctx->i32, param_index_base, 0);
+       }
+
+       return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
+                                         vertex_index, param_index);
+}
+
 static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
                                        struct si_shader_context *ctx,
                                        const struct tgsi_full_dst_register 
*dst,
                                        const struct tgsi_full_src_register 
*src)
 {
        struct tgsi_shader_info *info = &ctx->shader->selector->info;
        ubyte *name, *index, *array_first;
        struct tgsi_full_src_register reg;
        LLVMValueRef vertex_index = NULL;
        LLVMValueRef param_index = NULL;
-       unsigned param_index_base, param_base;
+       unsigned param_base;
 
        reg = src ? *src : tgsi_full_src_register_from_dst(dst);
 
        if (reg.Register.Dimension) {
 
                if (reg.Dimension.Indirect)
                        vertex_index = si_get_indirect_index(ctx, 
&reg.DimIndirect,
                                                             1, 
reg.Dimension.Index);
                else
                        vertex_index = LLVMConstInt(ctx->i32, 
reg.Dimension.Index, 0);
@@ -1018,33 +1046,25 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
                if (reg.Indirect.ArrayID)
                        param_base = array_first[reg.Indirect.ArrayID];
                else
                        param_base = reg.Register.Index;
 
                param_index = si_get_indirect_index(ctx, &reg.Indirect,
                                                    1, reg.Register.Index - 
param_base);
 
        } else {
                param_base = reg.Register.Index;
-               param_index = ctx->i32_0;
        }
 
-       param_index_base = reg.Register.Dimension ?
-               si_shader_io_get_unique_index(name[param_base], 
index[param_base]) :
-               si_shader_io_get_unique_index_patch(name[param_base], 
index[param_base]);
-
-       param_index = LLVMBuildAdd(ctx->ac.builder, param_index,
-                                  LLVMConstInt(ctx->i32, param_index_base, 0),
-                                  "");
-
-       return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
-                                         vertex_index, param_index);
+       return get_tcs_tes_buffer_address_from_generic_indices(ctx, 
vertex_index,
+                                                              param_index, 
param_base,
+                                                              name, index, 
!reg.Register.Dimension);
 }
 
 static LLVMValueRef buffer_load(struct lp_build_tgsi_context *bld_base,
                                 LLVMTypeRef type, unsigned swizzle,
                                 LLVMValueRef buffer, LLVMValueRef offset,
                                 LLVMValueRef base, bool can_speculate)
 {
        struct si_shader_context *ctx = si_shader_context(bld_base);
        LLVMValueRef value, value2;
        LLVMTypeRef vec_type = LLVMVectorType(type, 4);
-- 
2.14.3

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