On Wednesday, March 21, 2018 2:06:18 PM PDT Matt Turner wrote: > From: Anuj Phogat <anuj.pho...@gmail.com> > > When source or destination datatype is 64b or operation is integer > DWord multiply, DepCtrl must not be used. > We had this restriction on few previous intel platforms. It has been > brought back on Gen11+. > --- > src/intel/compiler/brw_vec4.cpp | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp > index e4838146ac1..bb668b2538a 100644 > --- a/src/intel/compiler/brw_vec4.cpp > +++ b/src/intel/compiler/brw_vec4.cpp > @@ -984,15 +984,19 @@ vec4_visitor::is_dep_ctrl_unsafe(const vec4_instruction > *inst) > * SKL PRMs don't include this restriction, however, gen7 seems to be > * affected, at least by the 64b restriction, since DepCtrl with double > * precision instructions seems to produce GPU hangs in some cases. > + * > + * This restriction is back in ICL+ platforms. > */ > - if (devinfo->gen == 8 || gen_device_info_is_9lp(devinfo)) { > + if (devinfo->gen == 8 || > + gen_device_info_is_9lp(devinfo) || > + devinfo->gen >= 11) { > if (inst->opcode == BRW_OPCODE_MUL && > IS_DWORD(inst->src[0]) && > IS_DWORD(inst->src[1])) > return true; > } > > - if (devinfo->gen >= 7 && devinfo->gen <= 8) { > + if ((devinfo->gen >= 7 && devinfo->gen <= 8) || devinfo->gen >= 11) { > if (IS_64BIT(inst->dst) || IS_64BIT(inst->src[0]) || > IS_64BIT(inst->src[1]) || IS_64BIT(inst->src[2])) > return true; >
Patch is bogus. Gen10+ doesn't and Gen11+ /cannot/ use the vec4 backend, so why are we updating it with Gen11 code? --Ken
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