A while ago, Mesa started using the full width of variables like
Stencil.WriteMask, etc. to store values, while previously it had
restricted itself to only the low 8 bits.
Unfortunately there are many cases in the dri drivers that assumed the
old behaviour, and did things like comparisons:
if (ctx->Stencil.WriteMask[0] == 0xff)
and also building hardware commands:
OUT_BATCH( SOME_COMMAND_TAG |
ctx->Stencil.WriteMask[0] |
SOME_OTHER_STUFF )
This was the cause of the recent i915 performance regression. The
change seems to have been noticed and local fixes for the change are
sprinkled through the drivers, but the attached patch is the first
attempt to look at all cases throughout the drivers where this may have
had an effect.
I'm travelling at the moment, and can't test the changes even on the
hardware I have. Hopefully people can do a little testing in the
meantime, I expect I'll commit this on Monday.
Keith
? depend
? diff
? diff-t_ureg-h
? ff
? ff.c
? newtnl
? array_cache/diff
? drivers/diff
? drivers/common/diff
? drivers/dri/diff
? drivers/dri/ff
? drivers/dri/common/d1
? drivers/dri/common/diff
? drivers/dri/ffb/diff
? drivers/dri/i810/diff
? drivers/dri/i830/ff
? drivers/dri/i915/diff
? drivers/dri/i915/full.diff
? drivers/dri/i915/render.diff
? drivers/dri/mach64/ff
? drivers/dri/mga/ff
? drivers/dri/r200/server
? drivers/dri/r300/server
? drivers/dri/radeon/diff
? drivers/dri/tdfx/diff
? drivers/dri/unichrome/via_drawable.c
? drivers/dri/unichrome/via_drawable.h
? drivers/x11/diff
? glapi/diff
? main/diff
? main/ff.c
? main/rework-vbo-ptr-abandon.diff
? main/statekey
? shader/diff
? swrast/diff
? swrast/s_fp_machine.c
? swrast/s_fragprog_to_bytecode.c
? swrast/s_trigen_c.c
? swrast_setup/dead
? swrast_setup/diff
? tnl/codegen.diff
? tnl/dead
? tnl/diff
? tnl/f1.S
? tnl/f2.S
? tnl/log
? tnl/tva.S
? tnl/vbo1.diff
? tnl_dd/log
? x86/diff
? x86/gen_matypes
? x86/matypes.h
? x86/rtasm/foo.c
? x86/rtasm/x86sse_inlines.h
? x86-64/matypes.h
Index: drivers/dri/i915/intel_ioctl.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/i915/intel_ioctl.c,v
retrieving revision 1.14
diff -u -r1.14 intel_ioctl.c
--- drivers/dri/i915/intel_ioctl.c 5 May 2006 06:52:32 -0000 1.14
+++ drivers/dri/i915/intel_ioctl.c 5 May 2006 09:25:25 -0000
@@ -418,7 +418,7 @@
if (!intel->hw_stencil) {
swrast_mask |= BUFFER_BIT_STENCIL;
}
- else if (ctx->Stencil.WriteMask[0] != ~0U) {
+ else if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
tri_mask |= BUFFER_BIT_STENCIL;
}
else {
Index: drivers/dri/r128/r128_state.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/r128/r128_state.c,v
retrieving revision 1.17
diff -u -r1.17 r128_state.c
--- drivers/dri/r128/r128_state.c 27 Oct 2005 21:21:05 -0000 1.17
+++ drivers/dri/r128/r128_state.c 5 May 2006 09:25:25 -0000
@@ -260,9 +260,9 @@
GLint ref, GLuint mask )
{
r128ContextPtr rmesa = R128_CONTEXT(ctx);
- GLuint refmask = ((ctx->Stencil.Ref[0] << 0) |
- (ctx->Stencil.ValueMask[0] << 16) |
- (ctx->Stencil.WriteMask[0] << 24));
+ GLuint refmask = (((ctx->Stencil.Ref[0] & 0xff) << 0) |
+ ((ctx->Stencil.ValueMask[0] & 0xff) << 16) |
+ ((ctx->Stencil.WriteMask[0] & 0xff) << 24));
GLuint z = rmesa->setup.z_sten_cntl_c;
z &= ~R128_STENCIL_TEST_MASK;
@@ -307,9 +307,9 @@
r128DDStencilMaskSeparate( GLcontext *ctx, GLenum face, GLuint mask )
{
r128ContextPtr rmesa = R128_CONTEXT(ctx);
- GLuint refmask = ((ctx->Stencil.Ref[0] << 0) |
- (ctx->Stencil.ValueMask[0] << 16) |
- (ctx->Stencil.WriteMask[0] << 24));
+ GLuint refmask = (((ctx->Stencil.Ref[0] & 0xff) << 0) |
+ ((ctx->Stencil.ValueMask[0] & 0xff) << 16) |
+ ((ctx->Stencil.WriteMask[0] & 0xff) << 24));
if ( rmesa->setup.sten_ref_mask_c != refmask ) {
rmesa->setup.sten_ref_mask_c = refmask;
Index: drivers/dri/r200/r200_state.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/r200/r200_state.c,v
retrieving revision 1.43
diff -u -r1.43 r200_state.c
--- drivers/dri/r200/r200_state.c 28 Mar 2006 17:22:57 -0000 1.43
+++ drivers/dri/r200/r200_state.c 5 May 2006 09:25:26 -0000
@@ -1452,8 +1452,8 @@
GLint ref, GLuint mask )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
- GLuint refmask = ((ctx->Stencil.Ref[0] << R200_STENCIL_REF_SHIFT) |
- (ctx->Stencil.ValueMask[0] << R200_STENCIL_MASK_SHIFT));
+ GLuint refmask = (((ctx->Stencil.Ref[0] & 0xff) << R200_STENCIL_REF_SHIFT) |
+ ((ctx->Stencil.ValueMask[0] & 0xff) << R200_STENCIL_MASK_SHIFT));
R200_STATECHANGE( rmesa, ctx );
R200_STATECHANGE( rmesa, msk );
@@ -1500,7 +1500,7 @@
R200_STATECHANGE( rmesa, msk );
rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] &= ~R200_STENCIL_WRITE_MASK;
rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] |=
- (ctx->Stencil.WriteMask[0] << R200_STENCIL_WRITEMASK_SHIFT);
+ ((ctx->Stencil.WriteMask[0] & 0xff) << R200_STENCIL_WRITEMASK_SHIFT);
}
static void
@@ -1601,9 +1601,9 @@
r200ContextPtr rmesa = R200_CONTEXT(ctx);
rmesa->state.stencil.clear =
- ((GLuint) ctx->Stencil.Clear |
+ ((GLuint) (ctx->Stencil.Clear & 0xff) |
(0xff << R200_STENCIL_MASK_SHIFT) |
- (ctx->Stencil.WriteMask[0] << R200_STENCIL_WRITEMASK_SHIFT));
+ ((ctx->Stencil.WriteMask[0] & 0xff) << R200_STENCIL_WRITEMASK_SHIFT));
}
Index: drivers/dri/r300/r300_state.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/r300/r300_state.c,v
retrieving revision 1.156
diff -u -r1.156 r300_state.c
--- drivers/dri/r300/r300_state.c 20 Apr 2006 19:43:21 -0000 1.156
+++ drivers/dri/r300/r300_state.c 5 May 2006 09:25:26 -0000
@@ -863,8 +863,8 @@
GLenum func, GLint ref, GLuint mask)
{
r300ContextPtr rmesa = R300_CONTEXT(ctx);
- GLuint refmask = ((ctx->Stencil.Ref[0] << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
- (ctx->Stencil.ValueMask[0] << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
+ GLuint refmask = (((ctx->Stencil.Ref[0] & 0xff) << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
+ ((ctx->Stencil.ValueMask[0] & 0xff) << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
GLuint flag;
@@ -890,7 +890,7 @@
R300_STATECHANGE(rmesa, zs);
rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~(R300_RB3D_ZS2_STENCIL_MASK << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT);
- rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= ctx->Stencil.WriteMask[0] << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT;
+ rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= (ctx->Stencil.WriteMask[0] & 0xff) << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT;
}
@@ -920,9 +920,9 @@
r300ContextPtr rmesa = R300_CONTEXT(ctx);
rmesa->state.stencil.clear =
- ((GLuint) ctx->Stencil.Clear |
+ ((GLuint) (ctx->Stencil.Clear & 0xff) |
(R300_RB3D_ZS2_STENCIL_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT) |
- (ctx->Stencil.WriteMask[0] << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT));
+ ((ctx->Stencil.WriteMask[0] & 0xff) << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT));
}
/* =============================================================
Index: drivers/dri/radeon/radeon_state.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_state.c,v
retrieving revision 1.43
diff -u -r1.43 radeon_state.c
--- drivers/dri/radeon/radeon_state.c 28 Mar 2006 17:22:57 -0000 1.43
+++ drivers/dri/radeon/radeon_state.c 5 May 2006 09:25:26 -0000
@@ -1282,8 +1282,8 @@
GLint ref, GLuint mask )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- GLuint refmask = ((ctx->Stencil.Ref[0] << RADEON_STENCIL_REF_SHIFT) |
- (ctx->Stencil.ValueMask[0] << RADEON_STENCIL_MASK_SHIFT));
+ GLuint refmask = (((ctx->Stencil.Ref[0] & 0xff) << RADEON_STENCIL_REF_SHIFT) |
+ ((ctx->Stencil.ValueMask[0] & 0xff) << RADEON_STENCIL_MASK_SHIFT));
RADEON_STATECHANGE( rmesa, ctx );
RADEON_STATECHANGE( rmesa, msk );
@@ -1330,7 +1330,7 @@
RADEON_STATECHANGE( rmesa, msk );
rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] &= ~RADEON_STENCIL_WRITE_MASK;
rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] |=
- (ctx->Stencil.WriteMask[0] << RADEON_STENCIL_WRITEMASK_SHIFT);
+ ((ctx->Stencil.WriteMask[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT);
}
static void radeonStencilOpSeparate( GLcontext *ctx, GLenum face, GLenum fail,
@@ -1458,9 +1458,9 @@
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
rmesa->state.stencil.clear =
- ((GLuint) ctx->Stencil.Clear |
+ ((GLuint) (ctx->Stencil.Clear & 0xff) |
(0xff << RADEON_STENCIL_MASK_SHIFT) |
- (ctx->Stencil.WriteMask[0] << RADEON_STENCIL_WRITEMASK_SHIFT));
+ ((ctx->Stencil.WriteMask[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT));
}
Index: drivers/dri/savage/savagestate.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/savage/savagestate.c,v
retrieving revision 1.41
diff -u -r1.41 savagestate.c
--- drivers/dri/savage/savagestate.c 6 Dec 2005 10:38:37 -0000 1.41
+++ drivers/dri/savage/savagestate.c 5 May 2006 09:25:26 -0000
@@ -986,8 +986,8 @@
const u_int32_t zBufCtrl = imesa->regs.s4.zBufCtrl.ui;
const u_int32_t stencilCtrl = imesa->regs.s4.stencilCtrl.ui;
- imesa->regs.s4.zBufCtrl.ni.stencilRefVal = ctx->Stencil.Ref[0];
- imesa->regs.s4.stencilCtrl.ni.readMask = ctx->Stencil.ValueMask[0];
+ imesa->regs.s4.zBufCtrl.ni.stencilRefVal = ctx->Stencil.Ref[0] & 0xff;
+ imesa->regs.s4.stencilCtrl.ni.readMask = ctx->Stencil.ValueMask[0] & 0xff;
switch (ctx->Stencil.Function[0])
{
@@ -1015,8 +1015,8 @@
{
savageContextPtr imesa = SAVAGE_CONTEXT(ctx);
- if (imesa->regs.s4.stencilCtrl.ni.writeMask != ctx->Stencil.WriteMask[0]) {
- imesa->regs.s4.stencilCtrl.ni.writeMask = ctx->Stencil.WriteMask[0];
+ if (imesa->regs.s4.stencilCtrl.ni.writeMask != (ctx->Stencil.WriteMask[0] & 0xff)) {
+ imesa->regs.s4.stencilCtrl.ni.writeMask = (ctx->Stencil.WriteMask[0] & 0xff);
imesa->dirty |= SAVAGE_UPLOAD_GLOBAL;
}
}
Index: drivers/dri/sis/sis_clear.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/sis/sis_clear.c,v
retrieving revision 1.9
diff -u -r1.9 sis_clear.c
--- drivers/dri/sis/sis_clear.c 9 Nov 2005 16:30:50 -0000 1.9
+++ drivers/dri/sis/sis_clear.c 5 May 2006 09:25:27 -0000
@@ -133,7 +133,8 @@
if ((smesa->current.hwCapEnable2 & (MASK_AlphaMaskWriteEnable |
MASK_ColorMaskWriteEnable) &&
(mask & (BUFFER_BIT_BACK_LEFT | BUFFER_BIT_FRONT_LEFT)) != 0) ||
- (ctx->Stencil.WriteMask[0] < 0xff && (mask & BUFFER_BIT_STENCIL) != 0) )
+ ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff &&
+ (mask & BUFFER_BIT_STENCIL) != 0) )
{
mask = sis_3D_Clear( ctx, mask, x1, y1, width1, height1 );
}
@@ -213,13 +214,13 @@
if (bClrStencil) {
dwSten1 = STENCIL_FORMAT_8 | SiS_STENCIL_ALWAYS |
- (ctx->Stencil.Clear << 8) | 0xff;
+ ((ctx->Stencil.Clear & 0xff) << 8) | 0xff;
dwSten2 = SiS_SFAIL_REPLACE | SiS_SPASS_ZFAIL_REPLACE |
SiS_SPASS_ZPASS_REPLACE;
dwEnable1 = MASK_ZWriteEnable | MASK_StencilWriteEnable |
MASK_StencilTestEnable;
dwEnable2 |= MASK_ZMaskWriteEnable;
- dwDepthMask |= ctx->Stencil.WriteMask[0] << 24;
+ dwDepthMask |= (ctx->Stencil.WriteMask[0] & 0xff) << 24;
} else if (bClrDepth) {
dwEnable1 = MASK_ZWriteEnable;
dwEnable2 |= MASK_ZMaskWriteEnable;
Index: drivers/dri/sis/sis_state.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/sis/sis_state.c,v
retrieving revision 1.16
diff -u -r1.16 sis_state.c
--- drivers/dri/sis/sis_state.c 26 Oct 2005 09:37:53 -0000 1.16
+++ drivers/dri/sis/sis_state.c 5 May 2006 09:25:27 -0000
@@ -251,7 +251,7 @@
if (ctx->Visual.stencilBits) {
if (flag || (ctx->Stencil.WriteMask[0] != 0)) {
current->hwCapEnable |= MASK_ZWriteEnable;
- if (flag && (ctx->Stencil.WriteMask[0] == 0xff)) {
+ if (flag && ((ctx->Stencil.WriteMask[0] & 0xff) == 0xff)) {
current->hwCapEnable2 &= ~MASK_ZMaskWriteEnable;
} else {
current->hwCapEnable2 |= MASK_ZMaskWriteEnable;
Index: drivers/dri/sis/sis_stencil.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/sis/sis_stencil.c,v
retrieving revision 1.4
diff -u -r1.4 sis_stencil.c
--- drivers/dri/sis/sis_stencil.c 24 Oct 2005 06:40:56 -0000 1.4
+++ drivers/dri/sis/sis_stencil.c 5 May 2006 09:25:27 -0000
@@ -45,8 +45,9 @@
__GLSiSHardware *current = &smesa->current;
/* set reference */
- current->hwStSetting = STENCIL_FORMAT_8 | (ctx->Stencil.Ref[0] << 8) |
- ctx->Stencil.ValueMask[0];
+ current->hwStSetting = (STENCIL_FORMAT_8 |
+ ((ctx->Stencil.Ref[0] & 0xff) << 8) |
+ (ctx->Stencil.ValueMask[0] & 0xff));
switch (func)
{
Index: drivers/dri/tdfx/tdfx_render.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/tdfx/tdfx_render.c,v
retrieving revision 1.8
diff -u -r1.8 tdfx_render.c
--- drivers/dri/tdfx/tdfx_render.c 4 May 2005 20:11:39 -0000 1.8
+++ drivers/dri/tdfx/tdfx_render.c 5 May 2006 09:25:27 -0000
@@ -70,7 +70,7 @@
mask &= ~(BUFFER_BIT_ACCUM);
if (mask & BUFFER_BIT_STENCIL) {
- if (!fxMesa->haveHwStencil || ctx->Stencil.WriteMask[0] != 0xff) {
+ if (!fxMesa->haveHwStencil || (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
/* Napalm seems to have trouble with stencil write masks != 0xff */
/* do stencil clear in software */
mask &= ~(BUFFER_BIT_STENCIL);
@@ -98,7 +98,7 @@
fxMesa->Glide.grStencilMask(/*ctx->Stencil.WriteMask*/ 0xff);
/* set stencil ref value = desired clear value */
fxMesa->Glide.grStencilFunc(GR_CMP_ALWAYS,
- fxMesa->Stencil.Clear, 0xff);
+ (fxMesa->Stencil.Clear & 0xff), 0xff);
fxMesa->Glide.grStencilOp(GR_STENCILOP_REPLACE,
GR_STENCILOP_REPLACE, GR_STENCILOP_REPLACE);
fxMesa->Glide.grEnable(GR_STENCIL_MODE_EXT);
@@ -129,7 +129,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
}
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
@@ -152,11 +152,11 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
- fxMesa->Depth.Clear);
+ fxMesa->Depth.Clear & 0xff);
/* clear front */
FX_grColorMaskv_NoLock(ctx, true4);
fxMesa->Glide.grRenderBuffer(GR_BUFFER_FRONTBUFFER);
@@ -164,7 +164,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
@@ -181,7 +181,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
@@ -198,7 +198,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
@@ -215,7 +215,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
@@ -225,7 +225,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
@@ -242,7 +242,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
@@ -254,7 +254,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
@@ -272,7 +272,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
else
fxMesa->Glide.grBufferClear(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
@@ -293,7 +293,7 @@
fxMesa->Glide.grBufferClearExt(fxMesa->Color.ClearColor,
fxMesa->Color.ClearAlpha,
fxMesa->Depth.Clear,
- (FxU32) ctx->Stencil.Clear);
+ (FxU32) (ctx->Stencil.Clear & 0xff));
if (ctx->Depth.Mask && ctx->Depth.Test) {
fxMesa->Glide.grDepthMask(FXTRUE);
}
Index: drivers/dri/tdfx/tdfx_state.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/tdfx/tdfx_state.c,v
retrieving revision 1.17
diff -u -r1.17 tdfx_state.c
--- drivers/dri/tdfx/tdfx_state.c 14 Sep 2005 00:36:28 -0000 1.17
+++ drivers/dri/tdfx/tdfx_state.c 5 May 2006 09:25:27 -0000
@@ -462,9 +462,9 @@
if (fxMesa->haveHwStencil) {
if (ctx->Stencil.Enabled) {
fxMesa->Stencil.Function = ctx->Stencil.Function[0] - GL_NEVER + GR_CMP_NEVER;
- fxMesa->Stencil.RefValue = ctx->Stencil.Ref[0];
- fxMesa->Stencil.ValueMask = ctx->Stencil.ValueMask[0];
- fxMesa->Stencil.WriteMask = ctx->Stencil.WriteMask[0];
+ fxMesa->Stencil.RefValue = ctx->Stencil.Ref[0] & 0xff;
+ fxMesa->Stencil.ValueMask = ctx->Stencil.ValueMask[0] & 0xff;
+ fxMesa->Stencil.WriteMask = ctx->Stencil.WriteMask[0] & 0xff;
fxMesa->Stencil.FailFunc = convertGLStencilOp(ctx->Stencil.FailFunc[0]);
fxMesa->Stencil.ZFailFunc = convertGLStencilOp(ctx->Stencil.ZFailFunc[0]);
fxMesa->Stencil.ZPassFunc = convertGLStencilOp(ctx->Stencil.ZPassFunc[0]);
Index: drivers/dri/unichrome/via_ioctl.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/unichrome/via_ioctl.c,v
retrieving revision 1.35
diff -u -r1.35 via_ioctl.c
--- drivers/dri/unichrome/via_ioctl.c 16 Nov 2005 17:24:26 -0000 1.35
+++ drivers/dri/unichrome/via_ioctl.c 5 May 2006 09:25:27 -0000
@@ -233,7 +233,7 @@
if (mask & BUFFER_BIT_STENCIL) {
if (vmesa->have_hw_stencil) {
- if (ctx->Stencil.WriteMask[0] == 0xff) {
+ if ((ctx->Stencil.WriteMask[0] & 0xff) == 0xff) {
flag |= VIA_DEPTH;
clear_depth &= ~0xff;
clear_depth |= (ctx->Stencil.Clear & 0xff);
