Hi, Thank you for your reply.
In the end, it turned out, that U-Boot SPL doesn't initialize ECC DDR memory (by writing to all addresses). The read operation from not initialized memory was causing CPU exceptions thus interrupting the whole boot process. I checked Xilinx FSBL and ECC initialization is there. I will try to port it to ZynqMP+ board initialization in U-Boot. Regards, Adrian On 12.11.2019 03:44, Jean-Francois Dagenais wrote: > Hi Adrian > >> On Oct 25, 2019, at 13:37, Adrian Fiergolski >> <[email protected]> wrote: >> >> Hi, >> >> I debugged the problem further. The PMU firmware, SPL and ATF pass >> successfully with warrior branch. ATF sets entry-point at 0x8000000 where I >> see binary of u-boot.bin. The boot process enter there and stops somewhere >> in _binary_u_boot_bin_start. Thus, I suspect problem with U-Boot relocation. >> Has anybody experienced similar issue? My understanding is that U-Boot takes >> size of RAM memory from device tree and a board providing 2GB DDR, would >> have an entry: > Sorry for the late reply I got pretty swamped over the last few weeks. I am > not sure at all if this is any related to a past experience I had with the > PMU overwriting my kernel image in RAM from a miscalculation of where it > should copy the FSBL for warm resets I think... anyway, see here if this > helps at all: > > https://www.mail-archive.com/[email protected]/msg03049.html > > Cheers! -- _______________________________________________ meta-xilinx mailing list [email protected] https://lists.yoctoproject.org/listinfo/meta-xilinx
