On 2011-04-06, JMGross <msp...@grossibaer.de> wrote:
>>>>> Ah. ?I guess I got taken in by TI calling the MSP430 a RISC machine.
>>>> Yea, that's a lie. I asked a TI FAE about that when it came up in his
>>>> power-point sleep--a-thon. He admitted it was a lie.
>>> I'd say technically its marketing.
>> There's a difference?
>
> There's a difference between a lie, not telling the whole truth and
> simplifying things. The MSP isn't a CISC too. It's more RISC than
> CISC
I disagree. It lacks almost all of the characteristics typical of a
RISC architecture:
* fixed, single-clock execution? No.
* fixed width instructions? No.
* load/store architecture? No.
* pipelined? No.
* Harvard architecture? No.
* branch delay slot? No
* small instruction count? Yes.
Not all "RISC" architectures have all of the above, but simply having
a small instruction count just isn't good enough IMO.
> (and has all advantages of a CISC by not having the drawbacks), so
> yes, it's not RISC but RISC-like. But you cannot explain ten pages of
> how RISC like it is when writing an ad.
>
> So RISC is much closer to the truth than CISC, and there's no 'MISC'
> in the middle. Also, RISC is no trademark and no otherwise protected
> term. It's a (not protectable) acronym and using it does not tie you
> to any definition. It's different to saying "it follows the RISC
> standard", which would be a lie if such a 'standard' did exist.
> However, the cited description of a RISC processor is no standard at
> all, just a description.
RISC is indeed a rather loose term based on a variety of criteria --
all but one of which (small instruction count) are not met by the
MSP430.
I really like the MSP430 architecture, but it's not a RISC processor.
It's an elegently stripped-down CISC processor.
--
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