> > It prevents the DMA from interrupting an ongoing RMW operation. Most reasonable DMA peripherals implement an ownership scheme that makes it unreasonable for the CPU and DMA device to be accessing the same memory at the same time, except for some well defined/behaved "ownership" flags/semaphores that wouldn't be accessed with RMW instructions when their ownership was in question anyway. If this is the sort of device you have, then there is probably no reason to slow down DMA by having it wait for all RMW instructions. If you have an ethernet, the CPU doesn't look at a packet until the whole thing has been DMAed into memory. "Buffer-oriented DMA", I guess.
OTOH, I can imagine other DMA peripherals (low speed UARTS, A-D converters; essentially continuous "small data" streams) where the DMA is a convenience feature (or power-saving in the case of MSP430 - load data without waking CPU) and both CPU and Device are going to be accessing some of the same DMA variables (byte counts?) and the RMW restrictions might be important. "Byte oriented DMA" > it's not a RISC processor. I always figured that there were two aspects to the RISC movement. 1) Don't implement instructions that compiler writers can't/won't use. "Add one to both halves and jump if negative" may be a joy for assembler programmers, but they're becoming a rare breed. Your "reduced opcode count" shows up here. 2) Simplify the HW implementation so that it can be made faster easier. Load/store and register-intensive issues are here. IMO, (2) has always had somewhat ambiguous results. Design complexity simply moved into memory subsystems, pipelining, and auxiliary processing units (floating point.) And it seems that among commodity commercial CPUs, it's CISC cpus (x86) that are winning the performance wars (though perhaps not the price/perf ratio wars.) (1) has been a pretty clear win, though. The cases where you "must" write assembler in order to access the special features of a CPU have gone way down. Most of the small microcontroller architectures never really made it to the RISC vs CISC debate, and many have claimed RISC-like features just as a result of being "simple." Marketing. BillW ------------------------------------------------------------------------------ Xperia(TM) PLAY It's a major breakthrough. An authentic gaming smartphone on the nation's most reliable network. And it wants your games. http://p.sf.net/sfu/verizon-sfdev _______________________________________________ Mspgcc-users mailing list Mspgcc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/mspgcc-users
