At 01:09 PM 8/19/99 +0200, you wrote:

>If the bit IE1 in register 0 is set then an interrupt will be generated if
>the FH bit is set. The interrupt will keep being generated until the FH bit
>becomes reset. You must see it as a copy from the FH bit on the
>interrupt-input of the Z80. So:
>1. the interrupt routine starts with a DI. If the interrupts are enabled
>before the interrupt-routine RETurns (so not using the EI:RET combination at
>the end) a new interrupt will be generated resulting in an infinite loop and
>finally a stack overflow.
>2. Unless status-register 1 is being read during the DI (interrupts
>disabled -> Z80 doesn't acknowledge incoming interrupts).

This still doesn't answer the question whether interrupt cancelling is
possible.

Scenario:
1. DI
2. enable interrupts at VDP level
3. wait for some time, long enough for an interrupt to occur
4. disable interrupts at VDP level
5. EI
6. test: does an interrupt occur?

If the IE (interrupt enable) at VDP level is a kind of switch that connects
the contents of the FH (or its 50/60Hz equivalent) flag to the IRQ line of
the Z80, the interrupt will not occur.
However, if the IE makes sure a kind of "interrupt flag" inside the VDP is
set when FH becomes 1, an interrupt will occur. If this is the case, it is
also interesting whether there is a single interrupt flag inside the VDP or
whether there are separate ones for line interrupt, retrace interrupt and
mouse/lightpen interrupt.

>If the IE1-bit is reset, then no interrupt will be generated, however you
>can still poll the FH bit (used a lot, probably in SRM too).

It's very useful if you set the line interrupt a few lines before the
actual line and then want to know exactly when the actual line is reached.
This mechanism "absorbs" fluctuations in interrupt response time that occur
for example if interrupts were disabled at the time the target line was
reached.

>> reg#1, bit 5, Horizontal scanning line, Interrupt Enable 0
>
>Wrong, not "Horizontal scanning line". With this bit you can en- and disable
>the normal interrupt (every 1/50th or 1/60th second when the VDP arrives at
>line 212).
>
>So it's got nothing (well almost nothing) to do with this issue.

Actually, it has. Since the line interrupt flag can be polled, this is
probably also true for the retrace interrupt flag. And the question of
cancelling interrupts is interesting in this case as well.

>I think you are using some docs
>not covering all (or covering things incorrectly).

I think he's using the V9938 data book from Yamaha, as that one contains
the error of calling IE0 a horizontal scanning line interrupt.

The problem with the V9938 data book is that it tells you how you can use
the VDP, not how the VDP works. Demo programmers and especially emulator
writers need to know the exact way in which the VDP operates.

For example, when setting the VRAM write register, they don't mention that
you only have to write register 14 if you want to access a different 16K
VRAM block. Normally, this information is useless, but if you're for
example making a sample scope for the music module (I did once), it's very
useful to speed things up.

By the way, the V9938 data book contains more errors. In some status
registers, the unused bits are supposed to be "1" according to the data
book, but are "0" in reality (or was it the other way around?).

Bye,
                Maarten


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