On 7/6/10, Drasko DRASKOVIC <[email protected]> wrote:
> On Tue, Jul 6, 2010 at 7:03 PM, Luisa <[email protected]> wrote:
>> Hi Drasko and Sebastien,
>>
>> Drasko, my fault. I meant 9600 Hz on my last email, rather than 96Khz.
> Even worst ;)
>
>
>> Also, just to know I'm not wrong with this as well, I'm supossed to
>> toggle the clock line each etu, don't I?
>
> No. You are expected to clock your card with 1Mhz. Toggle your card's
> clock line every 1uS.
>

Oh my god!, I was completely missunderstanding the whole clock thing!

> I/O line should be sampled every ETU, i.e. once every 372uS. Sample in
> the midle of ETU, to be sure (there are controllers that sample more
> times during ETU to take "majority vote" decision). Value should be
> constant during ETU, either "1" or "0", depends what "bit" card is
> sending you.
>

Yes, that's what I wanted to do, to take several samples per etu,
though now that I've got clear  how the data is transferred, I guess
my only way out is the chipsets' usart, probably with an external and
dedicated crystal for the card.

I'll look at it, but given your comments, I'd say this chip is
certainly not what one would like looking for as a test-bed for
smartcard development. I'll see.

Many thanks,

Thanks,
> BR,
> Drasko
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