It really has nothing to do with the cards as the select is driven by a 
flip-flop - I see the same thing on my board but have not set down yet to 
debug what is going on but Thomas is right there is some timing problem is 
going on as DO0 is clocked into the flip-flop via SEL_SECOND* and WR* being 
combined - there is a mis-timing of the signals as that really is the only 
thing that could cause this - guess others have been lucky or have not 
tried to use the second CF card.

Dave


On Sunday, June 8, 2014 7:42:16 PM UTC-5, Tom Lafleur wrote:
>
> fyi...
>
> One of the issues John has pointed out in the past, is that the current 
> software/hardware is VERY SELECTIVE on what brand and model of cards that 
> work with this board...
>
> It maybe necessary at some point to redo his code based on the Z80 Zeta 
> code or other ?, that handles a large number of cards...
>
> I'm sure its a timing issues... but it may need someone to look at it in 
> detail...
>
>  
>
>
> On Sun, Jun 8, 2014 at 7:43 PM, Thomas Owen <[email protected] 
> <javascript:>> wrote:
>
>> All,
>> My preliminary check this afternoon shows me that there is a timing issue 
>> at U15, the 74ls02.  Using my logic analyzer and monitoring the inputs and 
>> the output (which clocks the flip flop) I see a big timing difference 
>> between SEL_SECOND and WR.
>> What this means is that the output of the gate never goes high.
>>
>> I am going to start a new post to document and deal with the 
>> troubleshooting of this problem.
>>
>> Thanks,
>> Thomas
>>
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>
> Tom Lafleur
> (858) 759-9692
>  

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