On Sat, 2005-03-12 at 14:58 -0700, Grant Grundler wrote: > On Sat, Dec 03, 2005 at 02:37:59PM -0500, jamal wrote: > > On Sat, 2005-03-12 at 12:00 -0700, Grant Grundler wrote: > > > On Sat, Dec 03, 2005 at 09:20:52AM -0500, jamal wrote: > > > > Ok, so you seem to be saying again that for case #b above, there is no > > > > harm in issuing the prefetch late since the CPU wont issue a second > > > > fetch for the address? > > > > > > Right. > > > > > > (When that's not true, add to "cost of issueing a prefetch".) > > > > Can we verify if this is the case _always_ or it is the case of some > > architectures? It does seem like an obvious optimization .. > > TBH, I'm not interested in a fishing expedition right now.
Dude, _I_ need to know ;-> > When someone presents a particular prefetch which is measurably > hurting performance, then we can look at that implementation to > see if the cache controller is issuing multiple requests for the > same cacheline (or not). > What Dave wants is reasonable - I am hoping that the Intel folks will get around to it first having blown my 2.5" drive; i still need to know the answer to the question ;-> Counting on you. cheers, jamal - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
