On Sat, Oct 15, 2016 at 09:39:12AM -0500, Timur Tabi wrote:
> Florian Fainelli wrote:
> >After reading the spec again, it does not appear to me that a PHY
> >with PDOWN set is guaranteed or even required to respond to other
> >register reads such as MII_PHYID1/2, in which case we may have to
> >implement a MDIO bus reset routine which clears PDOWN for all PHYs
> >that we detect(ed), or as Andrew suggested, utilize the matching by
> >compatible string with the PHY OUI in it.
> The 8031 does respond normally when PDOWN is set. However, the ID
> registers are not available when the SerDes bus is also powered
> down. I'll call this PDOWN+. This is a special power-down sequence
> that the at803x driver does on suspend. See my other email for
So we appear to have two ways to go:
1) Take the SerDes power down out of the suspend code for the at803x.
2) Assume MII_PHYID1/2 registers are not guaranteed to be available
when the PHY is powered down. So get_phy_id should first read
MII_BMCR. If it gets 0xffff, assume there is no PHY there. If the
PDOWN bit is set, power up the PHY. Then reading the ID registers.