On Wed, 2005-02-02 at 21:40, Timothy Miller wrote: > On Wed, 02 Feb 2005 21:04:29 -0500, Andr� Pouliot > > > > To me it seem a possible options but I do see one or 2 potential > > problem. One of them is the card estate that you work on. We already > > have a FPGA, a serial eprom, eeprom for the card bios, 4 memory chip, > > the power supply section and now your talking to add potentially 3 more > > chip? Sorry but I can't see how it will all fit in. Also during > > production each additional chip add the probability of a defect and a > > additinal cost. Myself I would like to a single chip solution for the > > display if possible. I know the connexant is a closed part but if it can > > reduce the card necesary estate and free some space on the FPGA, because > > each extra chip will add some, well it is a needed evil. And nobody said > > that this chip can't be reverse enginnered. :) > > Ladies and gentlemen, I beseech you to gaze upon the visage of one who > has a mega-clue about what it's like to manufacture a card. > > In other words, you are so spot-on about this, it's painful. :) > Thank you for explaining this so succinctly. > > My opinion is that we should just keep looking. Surely, Conexant > isn't the only company that produces a single-chip solution to our > specifications. I also don't think it's necessarily a good idea for > Tech Source to engage in something that might be construed as an IP > violation. If they don't want our business, let it be their loss.
I wasn't suggesting you to break their IP. Since a lot of people on this mailing-list are not from the USA the applicable law are not the same. Also the interest for reverse enginered spec would be for the hobbyist who would like to use it and this type of people do know habitualy Verilog or VHDL. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
