On Wednesday 09 February 2005 07:30, Lourens Veen wrote:
> On Wednesday 09 February 2005 02:24, Daniel Phillips wrote:
> > On Tuesday 08 February 2005 16:43, Timothy Miller wrote:
> > > On Tue, 8 Feb 2005 16:06:05 -0500, Daniel Phillips wrote:
> > > > Vertical rasterization:
> > > >
> > > >   - one multiply per interpolant to correct for pixel alignment
> > >
> > > Well, here's what I think may have to happen (and it's going to
> > > kinda suck):  Since there's an alignment correction for each
> > > interpolant, plus we have to do the vertical interpolation, I
> > > suggest we use 2 or maybe up to 4 multpliers and have the
> > > vertical logic iterate over the interpolants.  For 17
> > > interpolants and 3 multipliers, that's 6 cycles to compute all
> > > interpolants so that the horizontal units can work on them.  But
> > > that's only 3 fp adders and 3 fp multipliers (gotta design one of
> > > those!).
> >
> > So the texture pipe will stall for every span less than 12 pixels
> > wide, which will be easily noticeable I think.  If we get rid of
> > one interpolant we get back two multipliers and can do the job in 4
> > cycles, with one multiplier left over.  Saving 1/3 of the span
> > setup in return for losing 1/17th of the interpolants sounds like a
> > pretty good deal to me :-)
>
> However, the smaller the triangles the less accurate perspective
> correction we need. Essentially, the T&L engine in software will take
> care of it by moving the vertices appropriately. Quake 1 did one
> reciprocal every 16 pixels.
>
> Maybe we could figure out some way of decreasing perspective
> correction quality in exchange for performance as triangles get
> smaller?

It sounds like a good idea, but a little messy.  Perhaps it's a good 
candidate for an update.  After all, updating is one of the really cool 
things about the fpga approach.

Regards,

Daniel
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