Ulf Ochsenfahrt <[EMAIL PROTECTED]> writes: > Of course, if a project is famous, there'll also be the occasional > good hardware hacker. I have no doubt that there will be plenty of > people falling over each other feet trying to write a kernel driver > for it, but I seriously doubt that there will be "a number of > experienced hardware hackers" joining soon. From what I've seen on > this mailing list, there were only few (2-3) people who claimed that > they know any Verilog at all.
Firstly: no, I haven't been to university yet. Yes, I have been writing HDL full time and being paid for it for a few months now. No, I don't know Verilog. That's because I've been working in a company where VHDL is the standard. I suspect there are a number of people lurking on this list who perhaps are very interested in HDL programming, but haven't had any motivation to learn Verilog or VHDL because there haven't been any affordable platforms to fiddle with it on, and very little example code to learn from (believe my, I've been struggling with this problem myself). It's a chicken and egg problem. A community of hackers around the OGL as a configurable logic platform *should* gradually gain momentum, by providing the resources needed for newcomers to learn the ropes and try out their skills. Of course, if people like yourself are going to maintain such a negative attitude you'll scare off all of the "experienced HDL hackers". A self-fulfilling prophecy, perhaps. Peter -- E-mail: [EMAIL PROTECTED] Website: http://www.peter-b.co.uk v2sw6YShw7ln5pr6ck3ma8u7Lw3+2m0l7CFi6e4+8t4Eb8Aen4g6Pa2Xs5MSr5p4 hackerkey.com _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
