On 5/26/05, Alexander van Heukelum <[EMAIL PROTECTED]> wrote:

> Hi!
> 
> Would it be an option to do all drawing in a line-by-line fashion? 

What do you mean?  That video memory would be accessed linearly?  That
is the general idea.

> For
> the bios graphics modes, each line occupies more or less contiguous
> memory in the vga buffer (worst case is 1280 bytes per line for
> mode 13h, because it's only using every 4th byte of every vga plane).
> For non-bios modes (including the win95 splashscreen), the memory
> access would sometimes need to be split in two because of strange
> address wraps. For text modes, caching the character set(s) would be
> beneficial. Worst case here is 512 characters of 32 bytes each: 16kb
> total. Could this amount of memory be allocated on the fpga?

There's no reason to store the VGA memory on-chip.  We're fast enough
that we can put it in graphics memory.

I think, however, that even done poorly, the translation code will be
fast enough, but if every instruction involves a lookup to execute,
that'll come out too slow.

In order to make memory reads efficient enough for the nanocontroller,
the read instructions should be split in two.  One instruction (like a
prefetch) requests the memory, and another pulls it out of a FIFO. 
You can then write the code to absorb some of the latency.

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