Jack Carroll wrote:

>On Tue, Oct 18, 2005 at 10:31:07PM -0400, Timothy Miller wrote:
>  
>
>>Well, since I can't find a diagramming app like I want, I thought I
>>might start working on one.
>>    
>>
>
>
>       Are you sure there isn't anything that will do what you want?  I
>haven't followed this thread closely, so I don't have a clear idea of the
>requirement.
>       If all you need is to draw lines on paper, there are plenty of
>candidates.
>
What is needed it's a tool where you can write on a box, what it's
doing(comportemental, work flow or description). Also create and
describe the signal linking it with other box near it. When you select a
box you can pop it open and have a new working sheet with the signal
comming from the "meta-box" and repeat the process of creating box
describing their behavior and the signal between them and linking them
to the meta-box. For being pratical it should allow opening "n" layer of
box in a box without to much difficulty(I think right now 10 would
bemore than enough but you never know).

The utility of that is creating a meta schematic of the chipand divide
it in smaller part(memory controller, vga core, pci core,....) and after
that, selecting the part you want to work on(ex: vga core) subdivising
it in smaller part until you can understand what your working on and how
it connect with the rest of the chip. A tool like that help prevent the
brain from frying, trying to remember all the interaction between each
component and how each component should work.

The application actually allowing something like that is called Simulink
and cost a bundle in licensing cost. Each of the other solution proposed
are nice but not near the requirement for a chip of that size and would
become not manageable rather fast. Also it will allow people to work on
smaller part of the verilog code by defining the requirement of each
part of the chip. Word are nice but they don't transmit the same amount
of data that graphic give. Also it will allow of an easier tracking of
what is coded and what need to be done.

That's my interpretation of the tool that Timothy would like to have for
working on the chip. As someone in the same domain I could certainly use
it, many other chip designer also.

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