On 3/2/06, Attila Kinali <[EMAIL PROTECTED]> wrote: > On Thu, 2 Mar 2006 15:13:26 +0000 > Peter Brett <[EMAIL PROTECTED]> wrote: > > > > I'd like to say, tho', that the schematics are probably not going to yield > > > any "bugs" - the errors that you will face will not come from schematic > > > problems but rather SI, PDS and stackup. These things are only evident > > > using a) high-power 2D field solvers (I still haven't worked out to do > > > this) b) trial & error c) US$250 / hour SI experts ;) > > This is less about errors in the schematic but about > design errors.
Well, we need to find ANY kind of error. And the longer we go without discovering the errors, the harder it'll be to fix them in the artwork. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
