> http://www.latticesemi.com/products/designsoftware/isplever/ispleverstarter.cfm
>
> I don't know what the catch is.  I know with Xilinx they don't support
> the really uber FPGAs in the free web-version of ISE, but otherwise it's
> identical.  It looks like the downside to this could be 6-monthly renewals.

For ECP support (which I think is the FPGA we're using) it says ECP6. 
I don't really know what that means, but I think it doesn't support
our FPGA.

> I like the idea of a "HDL in --> byte code out" site, tho', that's cool!
> If you could get a linux version and run it commandline, you could use
> Apache and some exec function to do that, I bet ... again, I can do it
> with Xilinx =/

Yeah, I wonder if the LEVER tool's license explicitely forbids making
a web service around the tool.  It would be nice if there were a way
to expose the tool's functionality in a legal manner, but even if it
can be done, it still feels sort of like piracy.  I'll be happy if the
ispLEVER Starter kit supports us and works under wine, I guess.
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