Even though it sounds silly, I was trying to play around with
constructing a simple async memory. So I build this module:
// 128KB Memory
// 16 bit addressing, 16bit word
module memory (input [15:0] addr, input [15:0] in, input write, input
read, output reg [15:0] out);
reg [15:0] mem [65535:0];
always @ (read,addr)
begin
if(read) out = mem[addr];
end
always @ (write,addr)
begin
if(write) mem[addr] = in;
end
endmodule
And a test module:
module memory_test();
reg [15:0] addr = 0;
reg [15:0] in = 0;
wire [15:0] out = 0;
reg write = 0,read = 0;
initial begin
$monitor("%g write=%b read=%b addr=%h in=%h
out=%h",$time,write,read,addr,in,out);
end
initial begin
read = 0;
write = 1;
in = 16'hff00;
addr = 3;
#1;
read = 1;
write = 0;
addr = 3;
end
memory A (addr,in,write,read,out);
endmodule
But I got the following output when executing a.out:
0 write=1 read=0 addr=0003 in=ff00 out=xxxx
1 write=0 read=1 addr=0003 in=ff00 out=xx00
I assume those 'x' means 'Don't Care', but why am I getting those?
It's even strange because it sets 0 accordingly.
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