> Could someone help me with the spec on the TV chip? In other words,
> could I get someone to read it for me and then answer specific
> questions?
I can look through it, and try to help, but I don't really have any
experience with anything beyond simple NTSC in the video category.
> Actually, at the moment, the main question is what is the pixel
> interface like? It appears to be DDR, very much like a single-link
> DVI transmitter.
Do you have a link to the datasheet? I couldn't find it anywhere on the
wiki.
I made a really bad test interface for the DVI output module.
This was really quickly hacked together. It is supposed to be a signal
generator for the video, but I am sure it fails miserably since I
haven't done Verilog in a while and don't really understand DVI video
sync. I had two big questions about what I was writing:
1) how do you define constants? I like having nice descriptive names,
and constants allow me to easily change the value. I googled it and
found "specparam", but it wasn't working.
2) What is the difference between "<=" and "="? I thought that "=" was
non-blocking, but after rereading your tutorial, I came across:
If you were to use blocking assignments, this is what you'd get:
always @(posedge clock) begin
x = in + 1;
y = x + 1;
z = y + 1;
end
time: values
0: in=3, x='hx, y='hx, z='hx
1: in=3, x=4, y=5, z=6
I don't understand how this is blocking, since all the computation
occurs in a single time period?
What I want for this code is that assignments like so:
hstate <= 0;
horiz <=0;
vert <=0;
vstate <=0;
are non-blocking, so that they execute in parallel, correct?
Also, is there a good resource that explains the DVI interface? I wasn't
really sure what I should send in terms of syncs, porches, etc...
Thanks!
// 800 X 600 @ 60Hz with a 40.000MHz pixel clock
module sync_const;
specparam H_ACTIVE = 800, // pixels
H_FRONT_PORCH = 40, // pixels
H_SYNCH = 128, // pixels
H_BACK_PORCH = 88, // pixels
H_TOTAL = 1056, // pixels
V_ACTIVE = 600, // lines
V_FRONT_PORCH = 1, // lines
V_SYNCH = 4, // lines
V_BACK_PORCH = 23, // lines
V_TOTAL = 628; // lines
specparam SYNC_DATA_STATE=0,
PORCH_DATA_STATE=1b'111111111111111111111111111111,
COLOR_DATA_STATE=0;
wire clock;
wire clock_2x;
wire reset;
wire [29:0] vidout;
reg [29:0] vid_data; //29:20 R, 19:10 G, 9:0 B
reg clk;
reg [9:0] vert; //current vertical scanline location
reg [11:0] horiz; //current pixel in scanline
reg [1:0] hstate; //horizontal and vertical states
reg [1:0] vstate; //so it is easier to ref them.
assign clock=clk;
initial begin
vert=0; horiz=0;
end
always begin
#5 clk=~clk;
end
always @(posedge clk)
begin
horiz <= horiz + 1;
if (horiz>H_TOTAL)
begin
hstate <= 0;
horiz <=0;
vert <= vert + 1;
end else if (horiz > H_SYNCH +
H_FRONT_PORCH + H_ACTIVE)
begin
hstate <= 3;
end else if (horiz >
H_FRONT_PORCH + H_ACTIVE)
begin
hstate <= 2;
end else if (horiz > H_ACTIVE)
begin
hstate <= 1;
end
//now all the states are correct:
//0) Active - White.
//1) Front Porch.
//2) Sync signal. 0.
//3) Back Porch.
//Now set up Vert in the same way...
if (vert>V_TOTAL)
begin
hstate <= 0;
horiz <=0;
vert <=0;
vstate <=0;
// new frame
end else if (vert > V_SYNCH +
V_FRONT_PORCH + V_ACTIVE)
begin
vstate <= 3;
end else if (vert >
V_FRONT_PORCH + V_ACTIVE)
begin
vstate <= 2;
end else if (vert > V_ACTIVE)
begin
vstate <= 1;
end
//now all is ready.
//insert here the code to make colors based
//on the various values.
//example: just sync signals.
if (vstate==2) //sync state
begin
vid_data<=SYNC_DATA_STATE;
end
if (hstate==2) //sync state
begin
vid_data<=SYNC_DATA_STATE;
end
if (hstate==1 || hstate==3) //porch state
begin
vid_data<=PORCH_DATA_STATE;
end
if (vstate==1 || vstate==3) //sync state
begin
vid_data<=PORCH_DATA_STATE;
end
if (hstate==0 && vstate==0) //draw state
begin
vid_data<=COLOR_DATA_STATE; //this is where you can add
// Based on the x and y locations on the screen, horiz
and vert.
end
$display("%g time; hstate %d, vstate %d. horiz=%d, vert=%d.\n",
$time,hstate,vstate,horiz,vert);
end
//head0_video_out u0(clock,clock_2x,reset,vidout,,,,,,,);
//I dunno what dvi_de, dvi_m_clk, dvi_s_clk are for... and we aren't
using
//dac_* for now, right?
endmodule
_______________________________________________
Open-graphics mailing list
[email protected]
http://lists.duskglow.com/mailman/listinfo/open-graphics
List service provided by Duskglow Consulting, LLC (www.duskglow.com)
