On 10/2/06, Nicholas <[EMAIL PROTECTED]> wrote:

Yes, the interface is DDR. It has a total of 9 modes (set with IN_MODE
pins). I am going to describe them in terms of pins_up[11:0] and
pins_down[11:0], which are on rising and falling edge of clockin,
respectively.
0000: 24 bit RGB.
pins_up[9:11]=g[2:4]
pins_up[4:8]=b[3:7]
pins_up[3]=g[0]
pins_up[0:2]=b[0:2]

pins_down[7:11]=r[3:7]
pins_down[4:6]=g[5:7]
pins_down[1:3]=r[0:2]
pins_down[0]=g[1]

This is what I need.  Thank you.

Why did you reverse the bit order?  I just want to be sure that I know
where the highest order bits go.  With then reversed, I can't be sure
if you mean that, for instance, g[7] is high-order or low-order.
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