Timothy Miller wrote: > On 1/2/07, Patrick McNamara <[EMAIL PROTECTED]> wrote: > >> How much speed can we get from the XP10? Enough to do any meaningful >> timing captures? According to the raw specs, we could theoretically >> sample at 10x the PCI bus clock for a 33Mhz bus but the front end would >> have to be very carefully crafted to ensure the timing was fast enough. > > You just made an interesting point. We can get the XP10 to go that > fast... but can we get that data quickly enough from the XP10 into the > 3S4000? That might be a problem. > Deep pipelines are your friend. :)
Actually, they 3S4000 really should do little more than pass the data through. Obviously, it needs to handle the RAM refresh, but beyond that, in capture mode, I would argue that all it really needs to do is track the memory location for the next sample and act as a pass through for the bus samples. There is no need to read from the memory during capture and there is likely no need to write to it during upload. Any processing or program store for an embedded core should use the DRAM/BRAM available in the 3S4000. Since I don't think we will be gate limited in either FPGA, brute force is a perfectly viable option. Function over form as it were. Patrick M _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
