snip

To me, the big news is that there is an actual prototype board.
That is a significant milestone.  And it shows that the project
is making real progress.

To me, it is a bit early to be drumming up interest in purchasing
the board.  Don't want to be accused of vaporware.  Perhaps we can
drum up interest in assisting the project.

Maybe something like

        The Open Graphics Project has completed a prototype
        of the OGD1 development board.

        <brief description of the OGD1>

        More information, including photographs of the
        prototype board, can be found at <URL>,

Depending on the audience, you might want to include a brief description
of the OGP, including the goal of a OGC board.

ok.. As one guy mentioned off list, some people don't appreciate the
time it takes to design  hardware. Lets try mxing all the ideas
together.. the target being those interested in our project or its
progress.

how about
-----------
The Open Graphics Project has released the first photographs of the
prototype OGD1 development board.

This Xilinx Spartan-3 XC3S4000 FPGA-based development board also
includes the (relatively) smaller Lattice Semiconductor XP10 FPGA for
PCI, two DVI head Video output, and an IDC plug compatable output. The
Production board will also include Video Out.

After completion of testing, this development platform will be sold by
Traversal the company founded by members of the project and used by
the Open Graphics Project to develop a variety of open architecture
hardware products, particularly a new graphics processor.

More information, including photographs of the prototype board, can be found at
http://wiki.duskglow.com/tiki-index.php?page=OGPN17



we then add to the ODG1page:
*************
Those who purchase this Xilinx Spartan-3 XC3S4000 FPGA FPGA-based
development with the (relatively) smaller Lattice Semiconductor XP10
FPGA from Traversal are expected to be provided with a library of
reference logic for
use in their designs, including controllers for memory, PCI, video,
and SPI.   Source code to the reference logic is available under
a variety of licenses, including the GNU General Public License. The
Sparten can be programmed via JTAG Header or PCI with code compiled
using the free tool by and Xilinx [1].The XP10 comes preloaded with
logic code for PCI [2] which is currently under development.

[1]
http://direct.xilinx.com/direct/webpack/63/WebPACK_63_fcfull_i.exe
[Requires login]
[2]
Programming the XP10 device currently requires purchased versions of
ispLEVER which you can find at their online store:
http://www.latticesemi.com/store/software.cfm
***********

hmm?
:-)
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