On 4/16/07, James Richard Tyrer <[EMAIL PROTECTED]> wrote:
I'm not a PCI expert. However, you are talking about the actual physical implementation in PCI. If masking is required, this would be a function in the PCI interface. However, IIUC, PCI devices are allowed multiple interrupts -- each PCI device is allowed to use all 4 interrupts. If they share common physical interrupt lines, this is an issue with the PCI interface hardware and driver.
We'll use a single interrupt line. Multiple conditions could cause the interrupt line to be signaled, but we'll just read a status register to find out which ones happened. In general, computers have a limited number of interrupt lines anyhow, so what the OS will do is call into your kernel driver, asking you if this is your interrupt. If it is, you service it and return a flag, indicating that you have claimed it. If not, you return a different flag, and the kernel keeps trying other drivers. If more than one device asserted the same line, then upon return from the ISR, the interrupt will happen again, and the process starts over. It's very important to clear your interrupt conditions before existing your ISR so that you don't cause spurrious interrupts. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
