Paul Brook wrote:
On a typical PCI system each device only gets a single interrupt pin (a
PCI bus has 4, but each device is only supposed to use 1), and several
devices share an interrupt line.
Thus all interrupts should be maskable on the device, and probably
combined into a single output after masking.
I'm not a PCI expert. However, you are talking about the actual
physical implementation in PCI. If masking is required, this would be a
function in the PCI interface. However, IIUC, PCI devices are allowed
multiple interrupts -- each PCI device is allowed to use all 4
interrupts. If they share common physical interrupt lines, this is an
issue with the PCI interface hardware and driver.
Each physical card has 4 interrupt pins (usually with a total of 4 shared
lines per bus), however each logical PCI device is only allowed to use a
single pin.
If you know how this works, they you should correct:
http://en.wikipedia.org/wiki/Peripheral_Component_Interconnect
IMHO the sync interrupt doesn't need to be different from to any other
interrupt.
If the interrupt is the same for sync and service request, then the
driver will have to read two status register bits to see which interrupt
is set before the interrupt is serviced and then write back to clear the
interrupt.
--
JRT
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