Timothy Normand Miller wrote:
On 4/17/07, James Richard Tyrer <[EMAIL PROTECTED]> wrote:

Have I been the victim of Intel hype?  They make hardware that would
make it possible to have enough interrupts for each PCI card slot to
have 4 interrupts or at least to have 24 hardware interrupts available
to be assigned with a cross point.

On a PCI bus, there are four interrupt lines.  All four are connected
to each slot, but in a different order.

Yes, that was one design but it is also possible to use PNP to assign interrupt numbers.

In some Sun hardware, each slot has its own set of interrupt lines.
But they do other weird stuff too.

That is the way all PCI systems should be. :-D

Also, in general, there are many sources of interrupts in a PC, but
they all route to one priority encoder that hands a binary number to
the CPU that tells it which one to pay attention to.  Then it comes
down to the ISR looking to figure out which source it is and so forth.

You're never going to get away from the fact that you have to query
devices to figure out which one asserted the interrupt, because you
cannot tell just from the interrupt number.

Actually, the Intel PIC chip has the interrupt vector in a register so when that interrupt is asserted, execution jumps to that address, IIRC, this vector points to an address in memory somewhere. So, on a PC running DOS, the jump to the interrupt routine is handled by hardware.

The standard PC AT hardware contained 2 PICs the first one with 7 interrupts (one is used to cascade) and the second one with 8. Some of these were assigned to specific purposes on the MB.

Since they could all be cascaded, it was possible with that hardware to make a system with 64 hardware vectored interrupts with 2 levels of PCI chips. Why this wasn't done when VLSI chips became common, and it would no longer take 9 chips, is a mystery since it would be backward compatible.

Then Intel introduced the APIC (which I don't have printed documentation for) which was supposed to support protected mode and more interrupts per chip. But, the question is whether or not current PCs still have only the standard 2 PICs or whether they have an APIC. Intel hyped the fact that PCI would have individual hardware vectored interrupts.

My current motherboard assigns interrupts to PCI slots which would appear to mean that all four interrupts in the slot feed to the same interrupt vector which seems to defeat the purpose of having 4 PCI interrupts. When you run out of interrupts (as I appear to have) the Kernel first applies the interrupt sharing driver to determine which PCI slot has raised the interrupt and then that slot's vector is called. This process is transparent to the driver.

I only have a basic understanding of this, but could look into it further if needed.

--
JRT
_______________________________________________
Open-graphics mailing list
[email protected]
http://lists.duskglow.com/mailman/listinfo/open-graphics
List service provided by Duskglow Consulting, LLC (www.duskglow.com)

Reply via email to