I'd like to tie up a loose end on the CPU. We also need to work out the
communication with the periphery, but this is about the instruction set:
Currently the instruction format can only fit 8 operators, which
currently are "and", "or", "xor", "asl", "add", "rsub" (y - x),
"mult", and "move" (with shunts). Note that
* "mult" is only signed and returns only the low 32 bits. We'd
probably want at least an instruction to get the high 32 bits.
Maybe also the x*y >> 16 operation which Tim suggested.
* Right shift is not needed since RHS is signed, but it may be useful
to have logic shift.
The nice thing about the current format is that immediates are 16 bits.
But I think, even if we drop "move" and "and" it'll probably be
insufficient with 8 instructions. Therefore, I suggest that we reduce
immediates to 15 bits. We could then use the 16 operator slots as
follows.
0 move -- with byte shunts
1 and
2 or
3 xor
4 shift x << y -- signed (aka asl)
5 ushift x << y -- unsigned LHS, signed RHS (aka lsl)
6 add x + y
7 rsub y - x
8 mult x*y -- signed multiply, low 32 bits
9 fmult x*y >> 16 -- fixed point multiply
10 multh x*y >> 32 -- signed multiply, high 32 bits
11 [reserved]
12 umult x*y -- unsigned multiply, low 32 bits
13 [reserved] x*y >> 16 -- see below
14 umulth x*y >> 32 -- unsigned multiply, high 32 bits
15 [reserved]
Instruction # 13 will be aliased from # 9 as a unsigned version of
x*y >> 16, but since this is probably not very useful, we can re-use
this slot if needed.
Are we missing any important operators here? (Remember that the
assembler will provide some derived operators like "neg", "not", "sub",
etc, and that branching instructions are separate and memory
instructions are orthogonal to these operators.)
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