On 3/11/08, André Pouliot <[EMAIL PROTECTED]> wrote:
> Following a discussion between Kenneth and me, we would like to add the
>  creation of a VGA core written in verilog for the GSoC ideas.
>
>  I know we were planning on doing VGA via software emulation with the HQ.
>  Doing it as a GSoC project also allows us to explore the design of a VGA
>  core without taking key developers away from the critical path. Doing an
>  hardware implementation would allow to see the space requirement and
>  possibly support more option for VGA. At the same time it would allow
>  for 2 different approach to be tested.

Are you suggesting a more direct hardware implementation?  One of the
reasons I suggested using HQ is that it MIGHT actually be smaller.  In
reality, what it does is trade gates for block RAM cells, but that's
not a bad tradeoff.



-- 
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Open Graphics Project
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