On 2008-08-13, Timothy Normand Miller wrote:
> > If I understand this correctly, flags = 2^(target - 1) where target is
> > one of {TARGET_ENG, TARGET_MEM, TARGET_VMEM, TARGET_IO}?  About the
> > translation, is the following correct?
> 
> Actually, it's {TARGET_IO, TARGET_VMEM, TARGET_MEM, TARGET_ENG}.

I meant that is conventional set notation, but I can see why it could be
confused as Verilog code...

> [...]
> Well, we should in fact have a programmable offset, now that you
> mention it.  The offset isn't necessarily 0xa0000.  That's just the
> address of the space as seen by the host.  In fact, the offset for
> 80x25 text mode may just be zero, and the pixel buffer that is scanned
> to the monitor lived at some offset.

I'll read the offsets from globals for now.  We can fill in detail later
and adjust the address translation later.
 
> This may be too synchronous.  This could be prepared to get one
> command in isolation, process it, and quit.  [...]

That makes sense.  Thanks for the explanation.  I attach a more async
rewrite.

> Also, another thing we might want to look at is some unrolled loops.
> [...] We should see if there's any benefit to this before doing it.
> These are performance tweaks we shouldn't do prematurely.

Yes, I'm just postponing it.  We can do that as part of the conversion
to assembler, or even after if we want to benchmark it.
#include <stdint.h>

/* Address adjustments. May be globals or constants. */
uint32_t g_mem_trans;	/* Adjustment of PCI_TARGET_MEM address. */
uint32_t g_vmem_trans;	/* Adjustment of PCI_TARGET_VMEM address. */
uint32_t g_io_trans;	/* Adjustment of PCI_TARGET_IO address. */

uint32_t g_poll_target;
uint32_t g_poll_addr;

void poll_pci()
{
    while (read_io(PCI_T_CMD_COUNT)) {
	uint32_t addr, count, info, target;

	info = read_io(PCI_T_CMD_INFO);
	switch ((info & PCI_TCINFO_TYPE_MASK)) {

	    case PCI_TCINFO_TYPE_ADDR:
		addr = read_io(PCI_T_CMD_DATA);
		g_poll_target = info & 15;
		switch (g_poll_target) {
		    case 1: /* engine */
			break;
		    case 2: /* memory */
			addr += g_mem_trans;
			break;
		    case 4: /* video memory */
			addr += g_vmem_trans;
			break;
		    case 8: /* IO */
			addr += g_io_trans;
			return;
		}
		g_poll_addr = addr;
		break;

	    case PCI_TCINFO_TYPE_RCOUNT: {
		uint32_t count, data;
		count = read_io(PCI_T_CMD_DATA);
		write_io(MEM_SEND_READ_COUNT, count);
		while (count) { /* unroll */
		    while (!read_io(MEM_READQ_AVAIL));
		    data = read_io(MEM_READQ_DATA);
		    write_io(PCI_TR_DATA, data);
		    --count;
		}
		break;
	    }

	    case PCI_TCINFO_TYPE_WDATA:
		addr = g_poll_addr;
		if (g_poll_target == 8)
		    handle_io(addr);
		else {
		    write_io(MEM_SEND_ADDR_MEM, addr);
		    for (;;) { /* unroll */
			uint32_t data = read_io(PCI_T_CMD_DATA);
			uint32_t enables = info & 15;
			write_io(MEM_SEND_DATA_0000 + enables, data);
			++g_poll_addr;
			if (!read_io(PCI_T_CMD_COUNT))
			    break;
			info = read_io(PCI_T_CMD_INFO);
		    }
		}
		break;

	    default:
		return;
	}
    }
}
_______________________________________________
Open-graphics mailing list
[email protected]
http://lists.duskglow.com/mailman/listinfo/open-graphics
List service provided by Duskglow Consulting, LLC (www.duskglow.com)

Reply via email to