André Pouliot wrote: > from what I could find for bus mastering it would mean that a > device can take control of the PCI bus to make transfer. Mostly for > DMA transfer with the main memory.
Right. The answer depends on the PCI core in the LFXP10e Lattice FPGA. > From what I remember HQ the microcontroller in the lattice chip, is > there to make and handle DMA request. Since the card can do DMA > request I would guest it can do bus mastering. Even if the HQ core or even HQ firmware does not do any bus mastering, it might still be possible with the card. But I fear that someone asking the question might have misunderstood the purpose of the board. The Lattice chip is an FPGA and thus reprogrammable. PCI bus master or not is not really a property of the physical hardware. //Peter _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
