I agree! The thing is, we first need to agree on an Architecture type / ISA
and the overall goal before the code can begin to flow.

Believe me, I am not stuck on OpenSPARC, but I have yet to see any other
CPU's that are opensource that are as complete and/or performant with a
generally good software stack already in place.

Troy, can you poke at the T2 a bit and see how it looks under the hood? How
difficult would it be to update to a DDR3 memory controller or ...? I have
seen mentioned someplace GDDR5 being used for main system memory. For a
highly performant SoC would such a thing make any sense?


On Sat, Dec 8, 2012 at 2:37 PM, Troy Benjegerdes <[email protected]> wrote:

> Troy Benjegerdes:
>  * Switch mode power converter prototyping
>         (aka, letting the magic smoke out of IRF511's)
>  * System architecture and performance evaluation [1]
>  * System software integration, board bring-up, testing
>         Motorola MTX (dual 604e)
>         CSPI Multicomputer (4 G4s + Myrinet on a board)
>  * System interconnect testing (SCL -> scl.ameslab.gov)
>         SCL G4 Mac cluster w/myrinet [2]
>         SCL SCI interconnect cluster [3]
>         SCL Cray XD1 [4]
>         SCL Power4/Power5 Infiniband cluster [5]
>         Cray Gemini & Aries interconnect
>  * Infiniband-FPGA project [6]
>         (also known as cat-herding undergrad students)
>  * NetPIPE benchmark [7]
>  * Start-up and new product business development
>         Black Lab Linux [8]
>         Freedom Fertilizer [9]
>         Cooperative Energy Futures [10]
>         The q3ube and The Brick [11]
>         Community Supported Development model [12]
>  * First (known) proposal for a full DFSG-compliant system design
>         (Debian Free Software guidelines) [11]
>
>
> [1]
> http://static.usenix.org/event/usenix04/tech/sigs/full_papers/benjegerdes/benjegerdes_html/usenix-ib-04.html
> [2]
> http://web.archive.org/web/20110620205553/http://www.scl.ameslab.gov/Projects/PPC_cluster/PPC_cluster.html
> [3]
> http://web.archive.org/web/20110620205544/http://www.scl.ameslab.gov/Projects/SCI_cluster/SCI_cluster.html
> [4]
> http://web.archive.org/web/20110620205555/http://www.scl.ameslab.gov/Projects/XD1/
> [5]
> http://web.archive.org/web/20110620205547/http://www.scl.ameslab.gov/Projects/IBMCluster/p655.html
> [6] http://seniord.ece.iastate.edu/may0904/
> [7] http://bitspjoule.org/
> [8] http://en.wikipedia.org/wiki/Black_Lab_Linux
> [9] http://freedomfertilizer.com
> [10] http://cooperativeenergyfutures.com/
> [11] http://q3u.be
> [12] http://q3u.be/CSD.html
>
>
> > Dear list members, answer this question honestly :-)
> > And only when many people have answered,
> > Tim can start to organise work and assign tasks.
> >
> >
> > Today my abilities are :
> >  * Actel Flash FPGA : full workflow and PCB design
> >  * VHDL : simulation (GHDL) and synthesis
> >  * PCB : SMI (aluminium), FR4 (2 sides), Kapton
> >     I'm looking at a provider for 4 layers FR4.
> >  * Layout : I have Eagle pro, manual routing.
> >  * soldering : down to 0603, no BGA
> >  * Programming : low level and its tools (just look at
> > http://yasep.org)
> >  * Languages : C, VHDL, Asm (many CPU), JS (plus some bash,
> >      a pinch of PHP, notions of other script languages)
> >  * Architecture : I created 3 ISAs, including F-CPU and YASEP,
> >     and more will certainly appear in the future...
> > Besicly I'm focused on embedded, low cost, DIY technologies.
> > I should be able to revive http://wiki.actuino.org/doku.php?id=layout
> > in 2013 or 2014, my todo list is currently exploding...
> >
> >
> >
> > >Is the GPLv2 compatible with AGPLv3?
> >
> > who cares, if everything can be under AGPLv3? :-)
> >
> > I believe that is is compatible for 2 reasons :
> >  *AGPLv3 adds on simple part that is not mutually exclusive
> >     with the GPLv3 : the fact that you provide the sources online.
> >  *GPLv2 is not exclusive with v3 because works should be licensed
> >     with a "GPLvX or later". GPLv3 is meant to be a compatible
> > extension
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