Timothy Normand Miller wrote: > No. What if you select a different register? At _best_ (assume we can > hack the internals of an SRAM block), it has the same circuit delay as > accessing any other register.
The optimization would be to have a special, shorter, circuit that detects R0 and outputs the fixed value. If SRAM is slower than logic the longer circuit for all non-R0 register accesses might be worth it? If the two extra gates (detector OR, output AND) have too much impact on non-R0 register accesses then it certainly isn't worth it. //Peter _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
