> >>> Deinterlacing is something that cannot be really done without > >>> some information from video source (or some assumptions on the video > >>> output device) and if only a simple implementation is used (which i > >>> assume), then the quality will suck. > >> Are we talking about motion compensating deinterlacing (for sources > >> originally shot with an interlaced video camera and recorded on tape)? > > > > No, we are talking about plain deinterlacing without any motion > > compensation. The one needed if you display interlaced content > > produced for TV consumption on a progressive display. > > Plain deinterlacing is just writes to and reads from memory. I don't > know how that could "suck"
Deinterlacing is a mess. :-( http://www.joesfilters.com/joesdeinterlacer.php http://www.firingsquad.com/hardware/nvidia_purevideo_interview/page6.asp http://www.100fps.com/ > With a computer monitor, if you can run at 72 f/s this gets much easier. Not a good assumption. Fixed-frequency CRTs can't, unless they happen to be 72Hz. Current LCDs run at 60 Hz, even the ones that claim to run faster. Conventional TVs will be fixed at 25 or 30 fps. I'm not sure about plasma, DLP, etc. > >>> All in all i would say we are better off to implement the stuff done > >>> by this chip in OGA directly. > > >> It is always better to implement stuff directly, unless it costs more to > >> reinvent the wheel. > > > > We don't have to reinvent the wheel, it's already out there. > > We just have to implement it again. > > It is just an English expression. Reimplementing something is > 'reinventing the wheel'. The question is whether it is cheaper to make > your own wheel or buy one that is ready made. For TRV10 it will almost certainly be less expensive to put as much functionality into the ASIC as possible and reduce the chip count. However this will take more design time. If there is a lump of functionality that will take a lot of design time but is available as an inexpensive and well documented chip, it might make sense to use that chip. There is also the Plan B approach of trying to find existing chips that can do what we need without having to build our own ASIC. _______________________________________________ Open-hardware mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-hardware
