Hi, Can a gatekeeper please review the attached vectorizer patch that: 1. Introduces an initial object-oriented framework of classes (SIMD_*) to represent and manage simd expressions.
2. Enhances the representation of constant integer vector and the
load-from-constant-integer-vector.
Before this change, a constant integer (say 4) is vectorized into
V16I4CONST. i.e a symbolic constant.
After this change, the vector is represented by:
U4INTCONST 4
V16I4I4REPLICATE
It is up to CG to determine how generate the code. Currently, the code would
be very
efficient if the element's value is 0. In this case, we need only one
arithmetic instruction
"pxor $xmm0, $xmm0". If element's value is non-zero, there are two options:
a)
- a.1) load integer to a scalar GPR, and
- a.2) move the GPR a SIMD register, and
- a.3) perform resuffle to replicate the element's value to the entire
vector.
b) save the vector as a symbolic constant, substitute the REPLICATE with
load from the symbolic constant.
b) is appealing for vector with short vector-length, say V16I8, and a) is
desirable for vector like V16I1. However, we are blocked at step a.2) --
A SIMD register is categorized as fp register, we have hard time moving a int
register to fp register.
3. Vectorizes loop with small trip count
The original SIMD implementation set a hard trip-count limit for
vectorization.
This change is to try to vectorize any loop so long as the trip-count >=
vector-len.
e.g. Following loop can be vectorized now:
for (int i=0; i < 2; i++) double_array[i] = (double)float_array[i];
(TODO in the future: For the loop like following, SIMD still try to perform
peeling in order
to archieve better alignment. This is a deoptimization if the trip-count is
too small. for (int i=0; i<4; i++) { a[i+1] = 0; })
Thanks.
Pallavi
vectorizer.p
Description: vectorizer.p
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