> It is good to be conservative in this area. Some AMD chipsets at least > had ordering problems with some configurations in the K7 era.
Could you expand a little? Do you mean that the arch implementation of pci_write_config_xxx() should have extra barriers, or that drivers should do belt-and-suspenders flushes to make sure config writes are really done properly? - R. _______________________________________________ openib-general mailing list [email protected] http://openib.org/mailman/listinfo/openib-general To unsubscribe, please visit http://openib.org/mailman/listinfo/openib-general
