-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Somebody in the thread at some point said:
| CLK_SRC is 0x00002007 early in the bootloader, b19b18 = 00 = MMC0 = | MOUTepll; 11 there would be 27MHz source. I didn't spot where the | bootloader MMC stuff changes the clock source to 27MHz, so something is | fishy somewhere. |> -#define S3C6400_CLKSRC_MMC0_MASK (0xf << 1) |> -#define S3C6400_CLKSRC_MMC0_SHIFT (1) |> +#define S3C6400_CLKSRC_MMC0_MASK (0x3 << 18) |> +#define S3C6400_CLKSRC_MMC0_SHIFT (18) |> merged into s3c64xx and pushed out. Thanks for the fix. - -Andy -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org iEYEARECAAYFAkkPEgkACgkQOjLpvpq7dMoPpACcDX0dvFaYgFRqIZySEWIWJszF 1UsAnieopegcCMO826A91jth1iNTZwO9 =nK8X -----END PGP SIGNATURE-----
