Thank you for your reply.
I noticed that the CPU has also
EJTAG_CE0 and EJTAG_CE1 pins.
These pins are used to select between JTAG and
EJTAG functions.
There 3 working modes
1.
Normal EJTAG operation - default
2.
Internal test only
3.
JTAG boundary scan
Which one should I use?
Thanks
> > I read about that and now I have a device that
> > reports all zeros
> > like this
>
> Try to add external pull-up resistors (10K ohms) up to VCC on ALL of the
> JTAG pins.
>
> Stian Skjelstad
>
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