On 03/21/2013 04:52 PM, Laurent Gauch wrote:
> Le 21.03.2013 16:41, Salvador Arroyo a écrit :
>>> But the num_cycles will be depending on the frequency of the JTAG 
>>> interface.
>> Of course.
>>> Are there any bit to check when scanning the target jtag register, 
>>> to know if the data is valid or not?
>>> Laurent
>> Each fastdata scan is 33 bits wide. The first bit scanned out, spracc 
>> bit, indicates if the transfer was successfull or not.
>> The problem is that most of us use ftdi based adapters. If we check 
>> every scan the resulting transfer speed is really 16/4K at most.
>> Current code queue all the transfer and execute it, without any wait 
>> between scans. This works up to some scan rate, but is enough to get 
>> a transfer rate of 100K.(at least for pic32mx at 8Mhz).
>> Adding a little delay between scans with jtag_add_clocks(), transfer 
>> rates of 500K are easy to reach, at least for pic32mx at 8Mhz and a 
>> scan rate of 15000Khz.
>>
>> Thanks
>> Salvador.
> how much clocks for a scan rate of 15Mhz ?
>
> Regards,
> Laurent
20

But if the wait 0 option for ram access is set, with 17 probably works.

Thanks
Salvador



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