Antonio,
Here is a summary of the specific patches I was referring to and their
current status...
These patches are add useful features and bug fixes, such as the ability
to step a single core in an SMP system, the ability to read ARMv8 system
registers regardless of the exception level, watchpoint support, a bug
fix for stale register values being reported, a bug fix for incorrect
CPU status being reported, and configuration files for Ampere eMAG
processors. They are waiting only on upstream approval.
- Add ‘steponly’ command for SMP - http://openocd.zylin.com/5570
- Add MSR/MRS TCL/UI support - http://openocd.zylin.com/5572
- Add watchpoint support - http://openocd.zylin.com/4761
- Fix GDB register list read - http://openocd.zylin.com/5574
- Fix CPU status reporting for ‘step’ - http://openocd.zylin.com/5208
- Add Ampere eMAG config files - http://openocd.zylin.com/5569
Ampere is currently making the updates that were requested for the
following two patches. These are required for processors which use
ADIv6 compliant DAPs.
- Add ADIv6 support - http://openocd.zylin.com/5576
- Remove ‘fake_thread’ workaround - http://openocd.zylin.com/5207
This last patch adds configuration files for Ampere Altra (Quicksilver)
and Altra Max (Mystique) processors which is dependent on the ADIv6 patches.
- Add Ampere QS|MQ config files - http://openocd.zylin.com/5591
-Tony
On 12/2/2020 10:55 AM, Anthony Ferranti via OpenOCD-devel wrote:
Ampere Computing is working on the changes requested during code review
of the patches submitted by [email protected]. This
includes the patches for ADIv6 support and a number of Arm v8 enhancements.
Given Arm's recent fanfare regarding the SystemReady program (formerly
Arm ServerReady), the Armv8 processors hitting the market this year from
Ampere Computing, Marvel, AWS, and Arm, and the fact that many Server
customers desire Open Source solutions, these changes would be aptly
timed if they could be included in the OpenOCD 0.11 release.
- Tony
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