This is an automated email from Gerrit. "Tarek BOCHKATI <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6553
-- gerrit commit a14ed782399d635c0518f4803a1e60efa3178e37 Author: Tarek BOCHKATI <[email protected]> Date: Wed Sep 8 12:49:50 2021 +0100 target/cortex_m: enhance multi-core examine logs Giving the example of STM32WL55x the examine log is the following: Info : stm32wlx.cpu0: hardware has 6 breakpoints, 4 watchpoints Info : stm32wlx.cpu1: hardware has 4 breakpoints, 2 watchpoints After this change the examine log becomes: Info : stm32wlx.cpu0: Cortex-M4 r0p1 processor detected Info : stm32wlx.cpu0: target has 6 breakpoints, 4 watchpoints Info : stm32wlx.cpu1: Cortex-M0+ r0p1 processor detected Info : stm32wlx.cpu1: target has 4 breakpoints, 2 watchpoints Change-Id: I1873a75eb76f0819342c441129427b38e984f0df Signed-off-by: Tarek BOCHKATI <[email protected]> diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 08f2eb911..d1129e306 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -2081,8 +2081,12 @@ int cortex_m_examine(struct target *target) armv7m->arm.arch = cortex_m->core_info->arch; - LOG_DEBUG("%s r%" PRId8 "p%" PRId8 " processor detected", - cortex_m->core_info->name, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf)); + LOG_INFO("%s: %s r%" PRId8 "p%" PRId8 " processor detected", + target_name(target), + cortex_m->core_info->name, + (uint8_t)((cpuid >> 20) & 0xf), + (uint8_t)((cpuid >> 0) & 0xf)); + cortex_m->maskints_erratum = false; if (core_partno == CORTEX_M7_PARTNO) { uint8_t rev, patch; @@ -2191,7 +2195,7 @@ int cortex_m_examine(struct target *target) cortex_m_dwt_setup(cortex_m, target); /* These hardware breakpoints only work for code in flash! */ - LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints", + LOG_INFO("%s: target has %d breakpoints, %d watchpoints", target_name(target), cortex_m->fp_num_code, cortex_m->dwt_num_comp); --
