This is an automated email from Gerrit.

"Antonio Borneo <borneo.anto...@gmail.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8128

-- gerrit

commit 55f41b7d8e1d37e74b831a0fbb2e8894fedc0bdc
Author: Antonio Borneo <borneo.anto...@gmail.com>
Date:   Sat Feb 3 14:29:57 2024 +0100

    flash: psoc6: drop incorrect use of 'coreid'
    
    The flag '-coreid' is used by the command 'target create' to parse
    the ROM table of the DAP AP and to select the N-th CPU, where 'N'
    is the value provided as 'coreid'.
    
    This flag has no effects on Cortex-M; ARM specifies that only one
    CPU Cortex-M can occupy the AP, using hardcoded addresses.
    
    The flash driver 'psoc6' abuses the flag '-coreid' to detect if
    the current target is the Cortex-M0 or the Cortex-M4.
    There are other ways to run such detection, without abusing an
    unrelated flag. E.g. the AP number or the arch type.
    
    Use the arch type to detect Cortex-M0 (ARM_ARCH_V6M) vs Cortex-M4
    (ARM_ARCH_V7M).
    Drop the flags '-coreid' from the psoc6 configuration file.
    
    Change-Id: I0b9601c160dd4f2421a03ce6e3e7c55c6212f714
    Signed-off-by: Antonio Borneo <borneo.anto...@gmail.com>

diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c
index b7ba1027ed..3a5a144b3a 100644
--- a/src/flash/nor/psoc6.c
+++ b/src/flash/nor/psoc6.c
@@ -224,6 +224,8 @@ static int ipc_poll_lock_stat(struct target *target, 
uint32_t ipc_id, bool lock_
 {
        int hr;
        uint32_t reg_val;
+       struct armv7m_common *armv7m = target_to_armv7m(target);
+       bool is_cm0 = (armv7m->arm.arch == ARM_ARCH_V6M);
 
        struct timeout to;
        timeout_init(&to, IPC_TIMEOUT_MS);
@@ -245,7 +247,7 @@ static int ipc_poll_lock_stat(struct target *target, 
uint32_t ipc_id, bool lock_
                        return ERROR_OK;
        }
 
-       if (target->coreid) {
+       if (!is_cm0) {
                LOG_WARNING("SROM API calls via CM4 target are supported on 
single-core PSoC6 devices only. "
                        "Please perform all Flash-related operations via CM0+ 
target on dual-core devices.");
        }
@@ -887,7 +889,8 @@ static int handle_reset_halt(struct target *target)
 {
        int hr;
        uint32_t reset_addr;
-       bool is_cm0 = (target->coreid == 0);
+       struct armv7m_common *armv7m = target_to_armv7m(target);
+       bool is_cm0 = (armv7m->arm.arch == ARM_ARCH_V6M);
 
        /* Halt target device */
        if (target->state != TARGET_HALTED) {
diff --git a/tcl/target/psoc6.cfg b/tcl/target/psoc6.cfg
index d69515cdf7..52b04f5694 100644
--- a/tcl/target/psoc6.cfg
+++ b/tcl/target/psoc6.cfg
@@ -113,7 +113,7 @@ proc psoc6_deassert_post { target } {
 }
 
 if { $_ENABLE_CM0 } {
-       target create ${TARGET}.cm0 cortex_m -dap $_CHIPNAME.dap -ap-num 1 
-coreid 0
+       target create ${TARGET}.cm0 cortex_m -dap $_CHIPNAME.dap -ap-num 1
        ${TARGET}.cm0 configure -work-area-phys $_WORKAREAADDR_CM0 
-work-area-size $_WORKAREASIZE_CM0 -work-area-backup 0
 
        flash bank main_flash_cm0               psoc6 0x10000000 0 0 0 
${TARGET}.cm0
@@ -128,7 +128,7 @@ if { $_ENABLE_CM0 } {
 }
 
 if { $_ENABLE_CM4 } {
-       target create ${TARGET}.cm4 cortex_m -dap $_CHIPNAME.dap -ap-num 2 
-coreid 1
+       target create ${TARGET}.cm4 cortex_m -dap $_CHIPNAME.dap -ap-num 2
        ${TARGET}.cm4 configure -work-area-phys $_WORKAREAADDR_CM4 
-work-area-size $_WORKAREASIZE_CM4 -work-area-backup 0
 
        flash bank main_flash_cm4               psoc6 0x10000000 0 0 0 
${TARGET}.cm4

-- 

Reply via email to