Thanks for taking care of this, Liviu.
I looked what ARM recommends as a workaround. Unfortunately there is no hint
how the debugger could reliably detect that the execution has halted due
to 3092511 erratum.
In such case it would be safe to resume.
The workaround in OpenOCD cortex_m.c cortex_m_debug_entry() should check
the DFSR register
and if the only BKPT bit is set, than check if PC points to a BKPT
instruction or any FPB
FP_COMPn has triggered the break and if not, then OpenOCD could resume.
Tomas
On 04/06/2024 21:10, Liviu Ionescu wrote:
Hi!
If you remember, some time ago we discussed about a weird behaviour of the M7
core when exceptions occurred simultaneously with exceptions.
I reported the issue to Arm, Joseph Yiu did some initial investigations and
confirmed the issue as a bug in the current core implementations; then the case
followed the internal path ending in an official errata. (see 3092511 at the
end of the PDF available at
https://developer.arm.com/documentation/SDEN1068427/latest/).
Regards,
Liviu
Begin forwarded message:
From: Joseph Yiu <joseph....@arm.com>
Subject: RE: Possible small bug in the Cortex-M7 core used by STM?
Date: 4 June 2024 at 21:52:14 EEST
To: Liviu Ionescu <i...@livius.net>
Hi Liviu,
It is finally published (defect 3092511)
https://developer.arm.com/documentation/SDEN1068427/latest/
regards,
Joseph
