> I'd say this is just one more argument for scriptable reset. There is no way > we'll be able to come up with an algorithm & config parameters something > that can cover all the weird reset schemes out there.... > > > I'm trying to summarize a consensus + plan here.... >
Before the ARM, I'd never met a device that used/had a TRST signal/pin. I have alot of cabling without it. Also, none of the logic devices have an SRST either. Usually just use a 6 pin (4 jtag + Vcc & Gnd) cable, seems to work on all my current FPGA & AVR designs... Steve _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
