Hello Steve and all, Steve Franks wrote: >> I'd say this is just one more argument for scriptable reset. There is no way >> we'll be able to come up with an algorithm & config parameters something >> that can cover all the weird reset schemes out there.... >> >> I'm trying to summarize a consensus + plan here.... > > Before the ARM, I'd never met a device that used/had a TRST > signal/pin. I have alot of cabling without it. Also, none of the > logic devices have an SRST either. Usually just use a 6 pin (4 jtag + > Vcc & Gnd) cable, seems to work on all my current FPGA & AVR > designs...
well, you are right. The reset_config basically does make sense for ARMs only. I do not think that scripting is really needed for doing reset properly, however, OpenOCD has to take care about keeping state of the whole JTAG chain in sync, that is, when TRST is pulled (or even SRST, if it pulls TRST), the state machine has to be brought to TLR state by means of TMS to ensure that the parts not connected to TRST/SRST are in sync. I do not know for sure whether OpenOCD does that in current revision (anyone?) Pavel _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
