On Tue, Jul 7, 2009 at 10:51 PM, Gene Smith<[email protected]> wrote: > Gary Carlson wrote: >> I am getting a bug message when I issue a ³reset halt² instruction from a >> telnet client using a j-link dongle. Has this instruction worked for anyone >> else before on other targets? Before I go off an hunt this down, I was >> hoping to see whether it is a problem isolated to my particular processor or >> a larger issue with the j-link code. > > With jlink on cortex M3 boards (ST Mic), "halt reset" works OK. But with > STR712 board (ARM7TDMI) it doesn't work and I have to do > "soft_reset_halt". I don't remember the exact failure with "halt reset" > with ARM7 since I don't have anything setup right now. > > Just another data point... >
Do you mean something like the following (for LPC-2148 with Olimex LPC-P2148, ARM7TDMI)? mc...@ubuntu904:~$ telnet localhost 4444 Trying ::1... Trying 127.0.0.1... telnet: Unable to connect to remote host: Connection refused mc...@ubuntu904:~$ telnet localhost 4444 Trying ::1... Trying 127.0.0.1... Connected to localhost. Escape character is '^]'. Open On-Chip Debugger > reset halt JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4) JTAG Tap/device matched srst pulls trst - can not reset into halted mode. Issuing halt after reset. target state: halted target halted in ARM state due to debug-request, current mode: System cpsr: 0x2000005f pc: 0x00000864 > soft_reset_halt requesting target halt and executing a soft reset target state: halted target halted in ARM state due to debug-request, current mode: Supervisor cpsr: 0x200000d3 pc: 0x00000000 > halt mc...@ubuntu904:~/Desktop/build/openocd/jlinkv3$ openocd -f lpc-p2148.cfg Open On-Chip Debugger 0.2.0-in-development (2009-07-07-07:38) svn:2484 $URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $ For bug reports, read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS RCLK - adaptive jtag_nsrst_delay: 200 jtag_ntrst_delay: 200 Info : J-Link initialization started / target CPU reset initiated Info : J-Link compiled Feb 20 2006 18:20:20 -- Update -- Info : JLink caps 0x3 Info : JLink hw version 30000 Info : Vref = 3.288 TCK = 1 TDI = 1 TDO = 0 TMS = 1 SRST = 0 TRST = 255 Info : J-Link JTAG Interface ready Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4) Info : JTAG Tap/device matched Info : accepting 'telnet' connection from 0 Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4) Info : JTAG Tap/device matched Warn : srst pulls trst - can not reset into halted mode. Issuing halt after reset. target state: halted target halted in ARM state due to debug-request, current mode: System cpsr: 0x2000005f pc: 0x00000864 requesting target halt and executing a soft reset target state: halted target halted in ARM state due to debug-request, current mode: Supervisor cpsr: 0x200000d3 pc: 0x00000000 -- Xiaofan http://mcuee.blogspot.com _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
