Jon Povey wrote: > At the moment I am looking into triggering a watchdog reset with a > reset-assert handler.. Be good if I can avoid soldering.
I am not having too much joy with this approach so far, maybe I don't know enough about ARM processor states. I had this trigger a reset once, but not reproduced since. My routine is below if anyone is interested. The DM355 datasheet suggests there is an IcePick command to do the same reset as the watchdog; from sprufb3 10.3.3: "To initiate max reset, the WDT expires (indicating a runaway condition) or the ARM emulator initiates a max reset command via the IcePick emulation module." This suggests that I might be able to give the IcePick a command to reset the SoC? Googling around I don't find too much information about the IcePick; there is this page on TI's wiki: http://processors.wiki.ti.com/index.php/ICEPICK I noted the interesting comment by a "db" - David Brownell? If anyone has information about using the IcePick to reset the DM355 I'd be very interested. My work-in-progress watchdog reset: $_TARGETNAME configure -event reset-assert { vidbox_reset } proc vidbox_reset {} { puts "vidbox_reset called" halt wait_halt # disable mmu? # reset via watchdog timer set wdt_base 0x01C21C00 set tgcr [expr $wdt_base + 0x24] set wdtcr [expr $wdt_base + 0x28] #TGCR.TIMMODE = 2h, TIM12RS = 1, TIM34RS = 1 mww $tgcr 0xB #WDTCR.WDEN = 1 #WDKEY = A5C6, DA7E, FFFF (trigger watchdog reset) mww $wdtcr 0xA5C64000 mww $wdtcr 0xDA7E4000 mww $wdtcr 0xFFFF4000 } -- Jon Povey [email protected] Racelogic is a limited company registered in England. Registered number 2743719 . Registered Office Unit 10, Swan Business Centre, Osier Way, Buckingham, Bucks, MK18 1TB . The information contained in this electronic mail transmission is intended by Racelogic Ltd for the use of the named individual or entity to which it is directed and may contain information that is confidential or privileged. If you have received this electronic mail transmission in error, please delete it from your system without copying or forwarding it, and notify the sender of the error by reply email so that the sender's address records can be corrected. The views expressed by the sender of this communication do not necessarily represent those of Racelogic Ltd. Please note that Racelogic reserves the right to monitor e-mail communications passing through its network _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
