On Fri, Oct 29, 2010 at 8:58 PM, Chris Jones <ch...@martin-jones.com> wrote: > Hi all, > > I'm using OpenOCD (version 0.4.0, downloaded from SourceForge and built > about half an hour ago) on Debian Lenny (5.0, stable) running under VMWare > Fusion on an x86 Mac Pro. The microcontroller I'm using is an STM32F103C6T6, > and the JTAG dongle is an Amontec JTAGKey. By and large it works: I can > program the flash, halt, use gdb, all the things I'd expect from OpenOCD. > > But there's a way of breaking it semi-permanently. The application on the > STM32 is one which spends most of its time with the CPU in Stop mode, waking > up periodically (about every 12ms) via an RTC interrupt to do some > processing. If I attempt to start OpenOCD while the microcontroller is > stopping and running like this, I get messages which say, > > Warn : Timeout (1000ms) waiting for ACK=OK/FAULT in JTAG-DP transaction > > and OpenOCD just won't work, though it finds the TAPs correctly so the JTAG > hardware is clearly working to some extent. > > The whole JTAG system appears to be then stuck in this state. Restarting > OpenOCD, doing a hardware system reset on the microcontroller, unplugging > everything including the JTAG dongle and its USB interface, all make no > difference. I've even tried exercising the JTAG port using another > application (XJTAG) though this only does boundary scan testing and doesn't > play with the ARM debug TAP. Though boundary scan works fine. > > The only thing which fixes the problem is power-cycling the STM32 chip > itself. I note from its documentation and the ARM Cortex-M3 TRM that some > parts of the core debug unit are only reset at power up, not in response to > a system reset. The device has no TRST pin. > > However, this board is going to be permanently moulded into a plastic lump > with a battery, so power cycling it is *not* an option. > > Am I stuck? Or is there a way of finding out how the Cortex-M3 debug unit is > wedged, if that's the case, and tickling it back to life?
The debug unit is clocked by the core clock. So, naturally, when you stop the core clock you'll lose all debug access. There's nothing OpenOCD can do about it. As Kyle said, you can flip some bits in DBGMCU_CR to keep the debug unit clocked even in sleep modes. That will enable you to debug but of course it will also drain your battery. One can also ponder why you need debug access to something molded in plastic... Wouldn't it be better to debug your application on a more lab-friendly setup? //Andreas _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
